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asic vera vcs resume Seeking a challenging and rewarding contracts in a good essay ASIC/FPGA Design Verification. Purpose Of Writing Caterham School? Overall experience of over 10 years in ASIC/FPGA Design/Verification Verified Fibre Channel - 1 and Fibre Channel Arbitration Loop RTL Developed TCP/IP Functional Models in SystemC and verified the TCP RTL implementation Designed and Verified ZBT SRAM and Flash interface for LEXRA RISC Processor Designed and Verified a Ingress FPGA [Virtex II] for Nortel s Gigabit Ethernet line card Verified SPI-4 Soft core and Synthesised the same towards Virtex II FPGA Designed and Verified USB1.1 Serial Interface Engine SOC Integration of a Smart Card ASIC Participated in School the development of a VHDL Simulator. Languages : VHDL / Verilog HDL, PERL, SystemC, Vera, C, C++ Simulators : NC Verilog, Verilog XL, ModelSim VHDL/Verilog simulators Synthesizers : Synopsys Design Compiler, FPGA Express, Leonardo Spectrum,Xilinx Implementation Tools, Synplicity Memory Compilers: Denali Pure View Foundry Tools : Samsung s Foundry tools Cubicware Protocols : TCP/IP, Gigabit Ethernet, Fibre Channel [FC - 1,FC - Arbitrated Loop], SPI-4, USB1.1, EP1284 and how to a university essay American, ISA. Write School? M.S. Electrical and Electronics Engineering. Created a detailed test-plan to verify the Fibre Channel [FC - 1 and FC - Arbitration Loop] RTL and verified the write a university essay American University Washington RTL as per the test plan Designed a Word Builder for the FC -1 block, integrated in the FC-1 RTL and verified the write a good same. Verified the RTL implementation of TCP/IP Stack. A detailed test plan was created and what purpose of writing an essay School, SystemC models of the functional blocks were written to write a good essay Millfield School, test the whole of TCP/IP Implementation. Designed and verified the LEXRA RISC Processor Interface with the functional blocks and verified the same. Designed and verified the ZBT SRAM and Flash interface for cousework Bishopstrow the Lexra RISC Processor. Integrated all functional RTL modules and created a system level top.
Perl scripts where written to manage the files and test cases. Created the Vera testbench environment for write a good essay Millfield School the whole chip. Modified the SPI-4 soft core both on the Sink and Source data paths. Synthesized the how to essay American University Washington modified RTL code on Synplifypro and implement the essay Millfield netlist on Xilinx Implementation tools targeting to Xilinx virtex II series. Verified the RTL and post layout netlist for functionality and essay University, timing. Write A Good Essay Millfield School? Ingress FPGA for line card: Designed and implemented the is the purpose Caterham School Network Processor interface on essay Millfield, the Ingress traffic flow towards the stages an essay Polimoda Switch fabric. The module also implements policing, segmentation, Packet format modifications and write Millfield, sends the packets across to the switch fabric. Synthesizing the modified RTL code on Xilinx Implementation tools targeting to Xilinx virtex II series XC2V3000 . Characteristics Eerde? Gate count of the complete Ingress FPGA 1,800,000 gates. Modified the write a good Millfield Accelar Simulation Environment Nortel functional simulation environment used for Verification used the same to what purpose an essay, verify the modified RTL code and synthesized gate level netlist. The job involved understanding the Accelar simulation environment and modifying the write essay Millfield same in accordance with the new requirement.
Verified the synthesized code on the Modified Accelar regression simulation environment. Trojan ASIC - USB Smart Card Solution: Synthesized the DesignWare 8051 of Synopsys Inc towards Samsung 0.35u STD90 technology on Eerde, Synopsys Design Compiler. Write Essay Millfield School? Designed testbench to University of California, Los Angeles, test the Millfield School DesignWare 8051 functionality. Mapped to whole design to XILINX FPGA - virtex series - using the Exemplar s Leonardo spectrum and Xilinx M1 implementation tools. The pre-layout and writing International Community School, post-layout simulations were done on MODELSIM simulation environment. Write A Good? SOC integration of Synopsys DW8051, Smart Card Interface chip, SIE USBC core. Project managed the whole simulation work of the USB-Smart Card. Enhanced already present Smart Card Device Model.
Responsible for testing debugging of the functionality of the design. USB SIE Serial Interface Engine : Designed tested of all the modules of Serial Interface Engine. Write A University Essay University? Project managed the whole simulation work of the Serial Interface Engine. Integrated the SIE with the USBC and essay Millfield, Mapped the whole design to XILINX FPGA - 4000XL series - using the Exemplar s Leonardo spectrum and Xilinx M1 implementation tools. The pre-layout and post layout simulations were done on MODELSIM simulation environment. Responsible for of critical thinkers Eerde testing debugging of the functionality of the SIE USBC design. Ultimate - VHDL simulator conforming to write a good Millfield School, IEEE VHDL specification : Took part in the kernel development of the simulator. Cousework College? Design and implemented an intermediate format for the simulator. Wrote extensive test cases to a good essay Millfield, test the various constructs and expressions of VHDL according to SPEC defined by IEEE.
References Furnished Upon Request. Development simulation/verification or design on high speed electronics. VHDL, C, MTI simulator, ModelSim, RiscWatch debugger. Digital Corp. San Jose, CA. Hardware Development Engineer.
Modified behavioral VHDL logic of an existing PowerPC 603 cpu simulation model to the rivue University Los Angeles, communicate between an essay School, ASIC and a C code simulator, including the addition of decoders, latches, and state-machine modifications. Designed VHDL logic code that enhanced the 603 cpu model by generating an internal address bus busy signal when an address-only phase is initiated by the ASIC. Developed 200+ C testcases for cousework Bishopstrow College functional simulation, system level stressing and debugging of the ASIC s internal logic, including cpu and pci address space, SRAM, cache, BAR and other registers. Co-developed C code for parity generation on a PowerPC 603 address bus and the ASIC s read-only cache register contents. Developed test plans to verify functionality of the ASIC s internal cache, and its 603 bus logic. Board-level timing analysis and measurements of write a good essay Millfield setup, hold, output valid times, overshoot, undershoot signal quality, frequency voltage margining for various end-of-life replacement chips on a Fiber-channel to PCI I/O adapter board used in high-end data storage servers. Simpson Communications Corp. White Lake City, UT. Stages Of Writing An Essay? Hardware Development Engineer. Designed, functionally simulated, and synthesized, using PC-based ModelSim, RTL VHDL code, that converts a serial bitstream of data into bytes, then calculates the essay Millfield School average byte value from 16 bytes of data. Translated PAL gray-code state machine and counter ABEL equation designs into behavioral and structural VHDL code then functionally simulated using Unix-based Synopsys tools.
Translated gray-code state machine and counter state graph designs into RTL and structural VHDL code then functionally simulated, using PC-based Xilinx Foundation Series and ModelSim tools. Developed a C code program that calculates a least-sum path of distances squared for of critical International Eerde a trade study that will implement ATM networking hardware on a good essay Millfield, a RF communications data link. Researched and wrote a white paper about Voice over ATM using AAL1 CBR, AAL2 rt-VBR AAL5 services and implementing G.711 PCM, G.726 ADPCM, G.728 LD-CELP, and G.729 CS-ACELP ITU-T voice compression standards, for write a university essay American University Washington networking over a RF communications data link. Amtel Corp. Boxsboro, OR. School? Configured and validated the compatibility of various PCI and EISA LANs and SCSI controllers and devices on quad Pentium-Pro Servers. Characteristics Thinkers International School Eerde? ADDITIONAL JOB EDUCATIONAL TRAINING: Fiber Channel, ATM VHDL course designing a 16-bit alu w/pipelined registers Analog RF/microwave theory, device physics theory, and CMOS VLSI design coursework COMPASS, SPICE, Touchstone/Libra, Fortran, Mentor, Viewlogic, FPGA Express and Synopsys tools. ME Electrical Engineering, University of Utah, Salt Lake City, UT. BS Electrical Engineering, University of Utah, Salt Lake City, UT. TO PUT MY EXTENSIVE ENGINEERING SKILLS TO WORK FOR YOU.
TARGET JOB: Telecommunications, Medical, Underwater Research and R D. Target Job Title: Engineering Manager. Alternate Target Job Title: Senior Electrical Engineer. Desired Job Type: Employee, Temporary/Contract/Project. Desired Status: Full-Time. Desired Salary: 95,000.00 USD Per Year. Site Location: On-Site. Job Title: SENIOR ELECTRICAL ENGINEER/TECHNICAL/ENGINEERING MANAGER. Career Level: Management Manager/Director of Staff. Date of Availability: Immediate. TARGET COMPANY: START-UP IN EITHER TELECOMMUNICATIONS,SCIENTIFIC R D or MEDICAL EQUIPMENT R D. Company Size: Prefer small. Essay Millfield School? Category: Electrical Engineering.
TARGET LOCATIONS: Will Relocate with conditions. WORK STATUS: UNITED STATES I am authorized to work in this country for any employer. Have held Security Clearances. Valid MASS Drivers License Class 3. Assigned tasks, maintained cost and schedule to a group of 20 Engineer and Manufacturing Personnel. Provided upper management monthly Progress Reports and Weekly Departmental updates. How To Write Essay American? Interacted with all required agencies, vendors, and customers to meet corporate objectives and deadlines. Extensive expertise in a good School the Engineering Process.
Highly skilled in Product Design Development of Electro-Mechanical Products. How To Write Essay American University Washington? Participated in providing Technical Engineering Leadership and write essay, Support to System, Concept, Equipment, Readiness and Production Review in Transiting new Designs into a Solid Product. Developed and essay American, Documented Specifications, Concept Definitions, Analyses and Trade Studies of various Electro-Mechanical Systems. Write School? Highly Knowledgeable of CAD Systems in generation of Assembly Dwgs., Parts Lists, Detailed Dwgs. How To American Washington? Altered Item Dwgs. School? Component Spec/Source Dwgs., Electrical Schematics, Interface I/O Documentation, PWB Artwork, Mechanical Dwgs,as required. An Essay School? Extensive hands-on experience in System Debug Component Level Troubleshooting, Electro-Mech Assembly, Integration Test, with wire-wrap and soldering expertise.
Integration and Millfield, Test of writing journal article Community School a variety of Computer Hardware. PROFESSIONAL WORK EXPERIENCE. SMARTWORKERS WAREHOUSE, Inc. Fitchburg, MA. Assistant Store Manager/Customer Service Rep. Providing management assistance to a good essay, Store Manager. Responsible for opening and closing. Assignment of daily retail task and scheduling of available manpower. Providing customers with benefits of my expertise in the Art of Woodworking. Upgraded and re-merchandise entire store increasing net sales by 30 . Have sold well over 250,000 woodworking tools in 8 months.
MILLERVILLE PHOTO PROCESSING CAMERA, Inc. Millerville, MA. Photo Lab Technician/Customer Service Rep. Processing and developing all types of Photographic Media including Digital Photography. Handing of Customer questions and accountable for cash flow. Expertise acquired in the service and maintenance of Fuji Photo Processing Equipment. Generated documentation of all Photo Processing and Printing Procedures.
Adhered to EPA Hazard Waste Requirements. Thinkers Eerde? COMPUTER AIDED SYSTEMS Boston MA. Consultant Electrical Engineer/Electronic Technician. Provided WEB Based Engineering Design Services doing Schematic Capture and PWB Layouts of PLC Interfaces using OrCAD. Performed various Test Engineering activities. Involved in assessing and performing the overall Functional and In-Circuit Test activities in the production and write essay School, repair of the is the an essay School DC-40 Handheld 486 Datacomputer w/LCD Display, PCMCIA I/F, Irda I/F, Modem I/F , and associated Power Supply SMD Assembly. Performed evaluation and refinement of a variety of Functional Test operations, debug analyses and recommended solutions to improve the production through-put and provide fully tested hardware to the customers of contract manufacturing firms. Created Final Test Procedure for the Nortel 1800 Chassis and Modules Communication System Card PC603 Based, Modem Assembly w/SMD Modem Daughter Cards. Documented and Performed Functional Test Procedure for TELCO Communication PWB Modules, WATERS Corporation PWB Module and a variety of MKS Sensor SMD Assemblies. ADVANCED SYSTEMS CO., Pillsbury MA.
Senior Development Engineer 1992-1998. Electronic Design Laboratory Lead Engineer and Cost Account Manager. Provided upper management monthly Progress Reports and Weekly Departmental updates. Interacted with all required government customer agencies, Program Management Office, Manufacturing Engineering and other Design Laboratories to Millfield School, meet corporate objectives and deadlines. Managed and participated in Electrical Engineering involved in the specifying, designing, development, testing, debugging and qualifying prototype Electronic H/W. Responsible for the daily technical operation and what is the purpose of writing an essay, security functions of the write a good essay School DoD Closed Area Digital Laboratory Central Test Facility. Upgraded and maintained PATRIOT COMO Simulation Laboratory. Technical Integration Lead to an engineering group of 10 engineers, in both hardware and how to write American University, software. A Good Essay School? Incorporating, integrating and testing PATRIOT COMO I/II Telecommunication Upgrades supporting electronic assembly upgrades through Manufacturing and Depot Integration. How To University? Technical Lead Integration Test Engineer for a good essay Millfield the Radio Logic Routing Unit-Upgrade Integrated and tested a number of an essay VMEbus designed Modules i.e.SBC, SIO, EPROM, ethernet supporting the RLRU-U transition to production and on through qualification testing at Field Sites.
Technical Lead Electrical Engineer for PATRIOT COMO UPGRADES participated and provided input to System, Concept, Equipment, Readiness and Production Reviews. Assistant Subcontract Manager for Smart Matrix Unit GTE and Lightweight Computer Unit SAIC integrated, tested and qualified into PATRIOT COMO. Development Engineer 1990-1992. Electronic Design Laboratory Lead Engineer and Cost Account Manager for TACIT Rainbow Mission Computer TRMC . A Good Essay Millfield School? The TRMC is what of writing an essay School, based upon a MC68030 with dual MC68332s along with two subsystems interface modules and write a good essay, a power supply. Supervised and directed four Electrical Designers. Participated and provided Technical Engineering Support to cousework, System, Concept, Equipment, Readiness and Production Reviews transiting the write essay Millfield TRMC Design into a solid Product with the of critical help of Concurrent Manufacturing Engineering. Developed requirement Specifications, Concept definitions, analyses and a good Millfield School, performance trade-offs of various system architectures. Generated Assembly Dwgs., Parts List, Detail Dwgs., Altered Item Dwgs., Component Spec/Source Dwgs., Electrical Schematics, Interface I/O Documentation,PWB Artwork, PWB Mechanical Dwgs. Cousework Bishopstrow College? as required.
Built, Serviced and Maintained the TACIT RAINBOW Software Development Facility, integrated prototype H/W along, with SPARC Workstations, IBM-PCs and Silicon Graphics Workstations in the performance of software code development, system simulation and software performance evaluations. TRMC 80 Logic in Altera FPGAs No PWB Design Errors. Directed Multiple Laboratory and Manufacturing resources into developing a fully integrated, form-factored and tested unit which was integrated into the TACIT RAINBOW Missile Prototype and Tested using LABVIEW. Senior Electrical Engineer 1987-1990. Digital Design Laboratory Lead Engineer and Cost Account Manager. Provided upper management monthly progress reports and weekly departmental updates. Assigned design tasks and maintained cost and schedule. A Good? Lead Engineer for University Los Angeles MIL-STD-1760 Missile Simulator Unit MSU 68020 based simulated aircraft stores interface for F15/F16/F18. Provided User Interface ports Monitor, Serial and Parallel Printer interfaces.
Tested and qualified to MIL-STD-810C 12 units. Lead Engineer for Missile Integration Test Set MITS Integrated, incorporated and tested Short Round Test Set into MITS H/W to provided Full-Up Missile Test. Lead Engineer for Dynamic Software Test Facility DSTF for software development designed, developed, integrated and tested a facility based upon five MC68020s, simulated internal missile interfaces via specialization circuitry and utilization of Personal Computers. Electrical Engineer 1986-1987. Module Design Engineer responsible for all components of the Module Design Process. Coordinated and supplied technical design input, integration test and write essay, operational inputs for innovative subsystem development. What Is The Purpose Of Writing Caterham School? Redesigned the write essay Digital Signal Processor and upgraded Missile H/W turning TTL Logic into Gate Array Logic using reverse engineering techniques. Designed and Supported two Missile PWBs using MENTOR, one a Data Acquisition Module 25 Analog/75 Digital and the other a Aircraft HOW Interface Module 50 Analog as part of Community School Low Cost Seeker Program HARM. Engineering Specialist 1985-1986 Specializing in Motorola Microprocessors incorporation, integration testing. Designer for Drop Test Seeker DTS Program Zilog Z8002 based Integrated Custom 10K Gate Arrays with Micro-Wire Technology using MENTOR and VHDL PWB Designer of Pre-Amplifier Module 100 Analog using PSPICE and MENTOR Proposal Engineer for essay Millfield US Navy Outer Air Battle Program.
RADMEX Inc. Boston MA. Senior Electronic Design Engineer. Performed and Specified the Electrical Design, Electronic Circuit Prototyping, PWB Layout, Product Documentation, H/W Development, Integration and Testing of a Computerized Newspaper Pagination System for a start-up company. Product Line developed and marketed was the Breeze Workstation , BitCaster Data Controller , BitPrinter Printer , BitSetter Typesetter and BitPlater Laser Platemaker . Article International School? Involved in all phases of electronic and a good essay School, product design, S/W H/W integration, test, production implementation, field service and marketing. Design/Developed a Raster Image Processor based upon the AMD2903 Bit-slice processor form factored on a 12 x 12 multi-layer PWB using inverse euro-connectors. Designed/Developed a Micro-Controller AM2910 with extensive memory, which produced a 96-bit microword form-factored on a 12 x 12 multi-layer PWB. What Purpose Of Writing An Essay? Developed unique high-speed clock using PAL Logic. Used Future Net and Multi-wire prototyping. A Good Essay Millfield School? Designed/Developed a Dual Port Module on a two-sided PWB using light table, which allowed the Los Angeles (UCLA) i ncorporation of a wide range of Off-the-Shelf Multibus I Modules.
DAYNEON COMPANY, Bedford MA. Test Engineering Aide. A Good Essay School? Worked in purpose of writing an essay the Missile Integration and Test Department of the Missile Guidance Laboratory while attending NU. A Good Essay? Assisted in the integration and testing of the prototype AMRRAM Missile. Involved in Polimoda the development of a good Millfield School a Missile Readiness Test Set MRTS . Responsibilities included: Creation of is the an essay Caterham School overall MRTS System Level Diagrams; Generation of Schematics, Part List and Wire Lists; Assembly Drawings. Oversaw building of unit and performed engineering inspections;Performed initial testing and write a good School, qualification testing. PANAMETRICS Inc., Waltham MA.
Design Engineering Aide. Under direction of Physicist and Electrical Engineers worked as a member of the Radiation Physics Laboratory while attending NU. University Of California, Los Angeles? Performed tasks in Prototyping, Development and essay Millfield, Testing of various, Satellite Subsystem H/W for cousework GOES Program. Held various jobs while attending college. Worked as Security Guards, Cashier at essay, Store24, Retail Sales at Building 19 3/4, Bottling Production Line, Electro-Plating Operator, and Warehouse Laborer. Had own summertime Painting and Landscape Business.
1981 NORTHEASTERN UNIVERSITY US-MA-BOSTON. Bachelor s Degree BS ENGINEERING TECHNOLOGY. 1976 Sylvania Technical School US-MA-Waltham. Certification COMPUTER ELECTRONICS. 1974 UNIVERSITY OF MASS US-MA AMHERST. Courses PSYCHOLOGY/CRIMINAL JUSTICE. ELECTRICAL ENGINEER/TECHNICIAN with extensive hands-on experience in SYSTEM DEBUG COMPONENT LEVEL TROUBLESHOOTING, ELECTRO-MECH ASSEMBLY, with WIRE-WRAP AND SOLDERING EXPERTISE.
Expertise with Microprocessor/DSP/Embedded Designs AMD, Motorola, Intel, TI ;Analog Design, RF Design, High Speed Digital Circuit Design; FPGA/PAL Logic Xilinx, Altera, Actel ; VHDL; Multilayer PWBs and SMD Assembly, EMI Design Techniques, Backplane Design Multibus I/II, VMEBus, ISA, PCI Bus Serial I/F: RS423, RS232C, RS422, RS485 PARALLEL I/F; 1553B I/F, IEEE-488; LCD Displays,PCMCIA I/F, Irda I/F, Modem I/F, SCSI1/2/3 I/F; Ethernet, Fiber I/F; Optics, Integration of a variety of computer hardware; Familiarity with Test Equip./ATE. PROJECTS, WORD, EXCEL, POWERPOINT, MENTOR Schematic Capture/Logic Simulation, PSPICE, CLARIS DRAW, MENTOR PWB LAYOUT, OrCAD,WINDOWS w/LABVIEW, MATHLAB; Assembly C Programming. DIGITAL TECHNOLOGIES, San Jose, CA. Involved in Ethernet/firewall product development for the OEM customer base. Designed the College architecture for the current ASIC Ethernet hub/switch.
This SOC included an ARM 7 processor, 5 MACs, a Triple DES core and 24K of Millfield School Dual Port SSRAM using .25-micron technology. Headed the design team in the implementation of the chip. VHDL was used for the design implementation. Characteristics Of Critical Thinkers School? Designed the board level firewall product that uses this ASIC. Implemented a Triple DES core into an Actel FPGA that was used on the low-end firewall product line. Designed a three-channel Fast Ethernet firewall controller using an Intel ARM 9 processor and an ITE PCI bridge. In charge of engineering development of board level designs for both product and OEM reference. Additional engineering responsibilities include: Wrote specifications for essay Millfield both chip and board level products. Wrote guidelines for PCB layout that encompasses component placement for high-speed signals and FCC compliance testing. Writing Article ICS — International Community School? Incorporated manufacturability into designs including ATE. Developed and maintained project schedules.
Interfaced with the software department for BIOS and POS functionality. MIRRENFAX IMAGE PRODUCTS, Sacramento, CA. December, 1997 to write essay Millfield, February, 1999. MANAGER OF ENGINEERING. Manager of the what purpose of writing an essay hardware engineering team. Millfield School? Involved in product planning for a new family of OEM image processing controllers. These controllers are installed in University of California, (UCLA) high-end scanners and allow Virtual Rescanning while automatically changing the image characteristics deskew, thresholding, intensity, cropping, etc. . Responsibilities include interfacing with scanner manufactures during product definition, scheduling of product development, resource management, project management, ASIC vendor selection and CAD tool evaluation and purchasing decisions. Involved with defining the next generation Image Processing ASIC. Responsibilities included defining functionality, project management, and vendor coordination. Also, designed the system architecture for a second ASIC that became the system intelligence. This contained an write School, embedded ARM7 processor, PCI interface, DRAM, etc.
Led the design efforts on this second ASIC. Both ASICs were in the 1M to 1.5 M gate range and implemented in purpose of writing Caterham .25-micron technology. A Good Essay? VHDL was used for characteristics of critical the design implementation. Designed several controller boards that used these ASICs for School different scanners. CMD TECHNOLOGY, Sacramento, CA. June, 1995 to December, 1997.
MANAGER OF ENGINEERING. Managed the Raid Division engineering team. Responsibilities included scheduling, budgeting and product development for both board and system level Raid products. Bishopstrow College? Involved in defining the next generation architecture of Raid controllers that was comprised of a four ASIC chip set. Project Manager for a Digital Equipment Corp. specific Raid controller. This project was a joint effort between CMD and Digital with CMD designing the controller and write School, Digital doing the mechanical packaging. Responsibilities included coordinating the hardware efforts between the two companies along with designing a FPGA that interfaces to Digital s EMU and Fault Bus. Designed the Raid controller board that was used by Digital.
Designed several other Raid controller boards that were used for the OEM market. University Of California, Los Angeles? Member of the Change Control Board CCB and the Advanced Products Group. Involved in implementing procedures between Document Control and Engineering. Write Essay School? CORSER CORP., Costa Brava, CA. Purpose School? May, 1992 to write a good Millfield, June, 1995.
Involved in the design of a DAT tape controller ASIC which interfaced to what purpose of writing an essay, a SP1 format tape drive. This ASIC was implemented in essay School .8-micron technology. Designed the next generation DAT tape controller ASIC. How To Write Essay University? This chip was implemented in essay Millfield .6-micron technology and has approximately 80K gates. An Essay? Designed the Millfield School tape controller board that uses the new ASIC along with a Data Compression/SCSI ASIC, V50 microprocessor, 1 MB of DRAM buffering and FLASH EEPROM. Joined the Arcuate Scan Tape group and designed an ASIC used in controlling the tape head preamps.
This ASIC was mounted to the head assembly using chip-on-board technology. Also designed the Servo Gate detection ASIC used for cousework head positioning. All ASICs designed and simulated at Conner were done using VHDL. IRVEL CORPORATION, Scottsdale, Arizona. December, 1988 to April, 1992. MANAGER OF ENGINEERING.
Management responsibilities for engineering, software, and write a good Millfield, test departments. Established procedures in top-down design methodology and functional specifications for Bishopstrow College the Software and Hardware Departments. This provided a path for write a good designs with a high degree of modularity and ease of cousework Bishopstrow College software/hardware integration. Defined future products and initial marketing strategies. Designed a proprietary Error Detection and Correction ASIC to be used in memory intensive products.
A 16 and 32 bit version of this ASIC was designed in 1-micron technology and consisted of write School 34K gates. CAD tools used in these ASIC designs include Cadence for schematic capture and of writing an essay, Verilog for simulation. Also designed a PC compatible memory board that incorporated this ASIC. Developed specifications, in conjunction with IBM Boca Raton, Florida , for a high performance PS/2 memory board. Involved in write a good Millfield School setting up incoming test procedures for partial memories using a Teradyne tester.
Two patents emerged from the research of characteristics of critical School Eerde memory subsystems. Essay School? FUTURAMA, Sacramento, CA. October, 1984 to November, 1988. PROJECT MANAGER/SENIOR ENGINEER. Involved in writing product specifications for an advanced system architecture that was incorporated into a microprocessor development system. Interfaced with the software development group to identify areas of concern when porting UNIX on to the new system.
Designed a 68000 based CPU board for this development system. Writing ICS — Community School? During the design phase of the write a good Millfield School CPU, research was done on of writing an essay, interfacing a 68000 to various memory management techniques along with different bus structures Multibus, IEEE 896, and VME . Designed the a good essay Millfield School system protocol that provided an International Community, efficient means of communication between the CPU and intelligent, DMA driven, I/O controllers. Write Millfield School? Designed an intelligent SCSI controller that used this protocol. TRIANON CORPORATION, Sacramento, CA. March, 1981 to October, 1984.
PROJECT MANAGER/SENIOR ENGINEER. Project Manager for the Mark III minicomputer. Responsibilities included managing an of writing Polimoda, engineering team and coordinating the software and a good, manufacturing departments efforts on cousework Bishopstrow, the project. Designed the hardware and firmware for the Mark III Peripheral Interface Board that contained a tape streamer interface, four asynchronous ports and a two-port SMD/CMD disc drive interface. The Peripheral Interface Board was designed using discrete logic and incorporated the 2903 bit slice architecture for write a good essay the micro-engine. The firmware consisted of 32 bit-wide microcode. COMPUTER AUTOMATION, Sacramento, CA. June, 1977 to March, 1981. Engineering team member involved in the development of a new processor and the related I/O controllers. Designed the stages of writing an essay interface protocol and an I/O relay controller for this processor.
This team was located in Dallas, Texas. Previously: Designed a debug module including hardware and write essay Millfield, firmware that could be used for debugging Z80 software. There was also a 32-channel trace for storing address, control, and data lines upon receiving a pre or post trigger. The back-end contained the necessary handshaking to what an essay, a modem so the board may be used remotely from the operator. Millfield? Initial assignments upon joining the company involved sustaining engineering hardware and firmware for a disc drive controller, synchronous communications controller, MOS memory board and writing article ICS — International, static problems with CRT s. BSEE, California Polytechnic University, San Luis Obispo, California, 1977. Concentration in Computer Systems. Will be furnished on request. Six years of write Millfield strong experience in the rivue Los Angeles (UCLA) research, analysis, design, development of instruments using VHDL/VERILOG, ASIC Design, FPGA design, digital design techniques, design using microprocessors and micro controllers. Expertise in essay School design and simulation of writing journal Community School electronic circuit boards using orcad, spice, circuit maker and write School, smart work. Expertize on Active HDL simulation package. Languages: C, C++ Application: FPGA, ASIC design, PCB design, Digital and analog circuit design Tools: Xilinx, Xilinx FPGAs xilinx 4000XL series, XILINX VIRTEX series , Cypress.
Hardware Definition Language HDL : Verilog, VHDL, 8051 assembly HDL Tools: ModelSim VHDL, Leonardo Spectrum, RAD51 assembler, ORCAD, Spice. Compiler: AVC51 Operating System: Unix, Windows NT/95/98. Digital Automatic Moisture Computer. Write American? September 2001 - Till date. Development of a stand alone device to measure moisture content of various agricultural products. Involved in Design and development of automatic moisture meter both independent and computer interfacable. First prototype developed around 8051 microcontroller using AVC 51 for embedded system. Involved in write a good essay sensor design. Design and coded same using C. Handled design and fabrication of analog and digital boards for first prototype.
Second prototype being developed as full custom SOC System on of California, Los Angeles (UCLA), chip for write a good essay Millfield School the calibration circuit around microcontroller 8051using simulation and synthesis tools of Bishopstrow mentor graphics. The input taken by sensor directly displayed in terms of percentage moisture. Development of write Millfield calibration technique based on method of least squares. Writing source code and test benches in an essay Polimoda VHDL for interfacing of 64K RAM, ROM, decoder and their interfacing with the A/D converter and PGA. Simulation of calibration process and verification of essay functionality and timing errors for same. How To A University Essay American University? Synthesizing code on Xilinx virtex series using Xilinx FPGA. A Good School? Environment: RAD51 assembler, AVC51, Mentor graphics, VHDL, Modelsim and Leonardo Spectrum, Xilinx, Virtex, Windows NT. Central Scientific Instruments Organization. How To Write American Washington? 8 BIT Microcontroller ASIC Design Engineer. Involved in design of a 8-bit micro-controller having features of INTEL 8051 microcontroller. A Good? The FPGA consists of 128K RAM and 64k ROM and is instruction compatible to University of California,, the Intel 8051.Prepared library package for the instruction set of the microcontroller in write a good essay Millfield School VHDL.
Wrote source code for the ALU to perform various arithemetic and logical opeartions. Source code for the RAM and ROM entity was written and debugged using test bench generation schemes. A complete model of the FPGA was designed using the above logical blocks and the design was implemented on Xilinx VIRTEX FPGA. a memory mapped output port was also added to the design. Environment: VHDL, Intel 8051 training kit, mentor graphics software , synopsys , Xilinx tools. Central Scientific Instruments Organization. Microwave Oven ASIC Verification Engineer.
Involved in the design of high frequency switching circuit to how to write a university essay, operate at a good essay Millfield, 2.5 GHZ using spice simulation software.Involed in counter design for the programmable counter for the magnetron switching circuit. Involved in debugging, verification and analysis of critical timing parameters for low power consumption and area size using Mentor graphics Leonardo spectrum synthesis tool . Synthesized circuit around rtl resistor transfer level after calculating timing delays and critical path parameters. The Rivue University Los Angeles? Environment: Spice simulation software for mixed mode signals, Mentor graphics simualtion and synthesis tools. Department of Science and Technology DST. Video Chip simulation ASIC Verification engineer. A VMIS Video million images per second embedded processor was studied and was simulated for various digital applications. Captured top-level video inputs simulation of VMIS video million images per second TV controller chip having an essay Millfield School, embedded processor. Enabled signal processing for digital applications.
Worked in a team for simulation of chip. Carried out chip verification using using tools from mentor graphics. Verified ASIC for article ICS — International School rtl resistor transfer logic syntax and semantics. Write A Good Millfield? Used Configuration Management Tool for database version control. Environment: Embedded processor from sigma Electronics, Mentor graphics tools, VHDL, Windows 98. Technology mission for oil seeds and pulses. Sept 1998- June 1999. NIR Near Infra red BASED CEREAL / GRAIN ANALYSER Hardware engineer. Selected photodiodes according to wavelength of various samples to be measured for different parameters.
The selection of photodiodes was done to opearte at radio frequencies. Designed analog and digital board around SPICE simulation software. Interfaced memory and display using embedded system programming using AVC 51, RAD 51 around microcontroller 8051. Further, an cousework College, FPGA was developed to perform the application of a good essay Millfield microcontroller 8051 and journal article ICS — Community, the entire calibration circuit was interfaced around the Xilinx FPGA. Coded using VERILOG. The digital circuit associated with ROM, RAM, decoder,latch was implemented with the developed Xilinx FPGA microcontroller . As a team member wrote source code for the FPGA microcontroller features and tested the functionality of interfacing circuit and simulated it using modelsim VERILOG.
Environment: Microcontroller 8051, AVC51 and RAD51, Spice, Mentor graphics tools, model sim, Leonardo spectrum, Unix shell scripts. Department of Science and a good Millfield School, Technology DST. Thinkers School? CPU Central Processing Unit Design ASIC Design Engineer. Designed and developed a 8-bit microprocessor. The device consists of a RAM, ROM, a high speed ALU, shifting, decoding and multiplexing circuitry. Made package for write essay School the instruction set of Bishopstrow 8085 in VHDL. Wrote source code for the ALU to perform arithmetic and logical operations using VHDL, source code for the RAM and ROM implementation.
Simulation of the write a good School functionality of the processor using test benches on Active HDL simulation package in Window NT environment. synthesized the same on XILINX FPGA. A University University? Environment: Active HDL, Vinytics 8085 microprocessor kit, Xiilinx spartan series,Windows NT. Technology Mission of Oil seeds and write essay, Pulses. Digital aflatoxin meter Test Engineer. The Rivue University Of California,? Designed electronics related to system around ORCAD IV , checked for the functionality of the design using mixed mode signal simulation around ORCAD IV and a good, development of calibration software around microprocessor 8085. Cousework College? Documented instrument for transfer of essay know how and providing intensive training to user on how to use same. Environment: ORCAD IV, Vinytics 8085 kit, assembly programming for 8085. Department of stages an essay Polimoda science and technology. Sept 1996- March 1997. Gold Analyzers Test Engineer. Developed analog and digital electronics design circuit board using ORCAD.
Checked the functionality of the write a good essay same and purpose of writing an essay Caterham School, its interfacing with the write essay Millfield School sensor. Documentation of how to write University instrument. Involved in selection of principle of purity measure using non-destructive technique based on energy dispersive X-Ray fluorescence spectrometry. Environment: ORCAD Version 1V, Windows 98. The projects around VHDL were coded and tested before synthesis and write essay Millfield School, also associated with PAL Programming, analog and breadboard testing. Responsible for integration and test of a UART, real time clock, keyboard controller, DMA controller and interrupt controller chip. Journal Article Community School? This helped in gaining good understanding of ASIC design and verification methodologies along with PAL and FPGA programming. Responsible for working with clients on intensive short term methodology training.
Responsible for write essay Millfield School training students in journal ICS — International Community School VHDL, synthesis and methodology. Aid in adaptation of training materials and a good essay Millfield School, development of new training classes. Paper publications and presentations have been made on Digital Automatic Moisture Computer and Capacitive moisture measurement of grains and oil seedsin various national journals. Training has been imparted to various engineers and students of engineering colleges from time to time. Significant contribution in organization of various seminars and conferences related to instruments developed, various projects for water quality monitoring and the rivue (UCLA), soil analysis have also been designed and developed. B.S. in Electronics Engineering. Assume a role in ASIC Verification/Applications/Design Engineering. 4+ years experience in a good Millfield School the EDA Verification Industry. Senior Project Engineer (Promoted from Applications Engineer) Technical Lead for a TtME (Time to Market Engineering - a design verification consulting service) project for write a university essay American Washington a Germany based company.
Successful completion of the project lead to the sale of an emulation system. Verified a 2+ million gate ASIC design. Assisted in project startup, Assessed project needs for verification and implemented design optimizations (for environment, RTL level and simulation). Executed project milestones such as running RTL design (Verilog and VHDL) through synthesis and simulation, providing training implementing Cadence verification tools on site. Used test benches for passing vectors and debugging simulation differences. Write A Good School? Implemented Verification Flow. Identified introduced Cadence tools to the Verification process. Advised on design methodology and validated the subsequent setup. Of Writing Caterham? Lead Engineer for a European account (Philips - HDTV division): Consulted on Verification flow, and provided optimization ideas. Offered on site support and essay Millfield, tool integration.
Implemented a synthesizable cycle based design and test bench, and helped with the execution. Assisted in customer evaluation (San Jose based IC design company for DTVs) for write essay American a simulation acceleration beta product. Worked with verification engineers to write optimized test benches. Worked on a product evaluation with Ericsson, Sweden, that resulted in sales for numerous simulation software licenses. Worked closely with Quickturn RD and a third party RD (Verisity) that provided the testbench generating tool. The customer desired a combined product of 3 verification products along with a testbench generating tool. Worked with QT and Verisity s RD to integrate all of these products. Provided post-sales technical support and worked to increase the simulation performance. Used profiling tools to essay, determine simulation speed bottlenecks. Implemented RTL and C model design changes for maximum performance optimizations.
Successfully completed a TtME project with Ericsson, Germany, over a four-month period. This involved remodeling (in Verilog) significant portions of their design, testbench and is the purpose of writing Caterham, memory models to be cycle based. Debugged differences in a good essay Millfield School simulation results between Speedsim and the customer s internal simulator. Successfully completed a two-month TtME project with Cabletron. Support included consulting on testbench methodologies, creating a synthesizable testbench, remodeling LSI memories to be cycle based, and making the LogicVision environment compatible to Speedsim. Assisted the Quickturn India Distributor with a customer evaluation. Write Essay? Responsibilities included going on site and using test bench methods, passing vectors for write a good essay showing proof of Speedsim functionality and Bishopstrow College, performance on their design. Provided training to Application Engineers on topics related to simulation/acceleration tools during boot camps and other training sessions. Worked on numerous customer benchmarks which required verifying 1+ million gate ASICs with Quickturn/Cadence lint checker, synthesis, simulation, acceleration and emulation tools.
Presented demos and presentations at write a good essay Millfield School, DAC 98 and what purpose of writing, DAC 00. Corporate Technical Support Specialist: Provided technical support for all of Quickturn s Simulation/Acceleration products. Clients included Ericsson, Intel, IBM, Lucent, AMD, Fujitsu, Philips and Mitsubishi. Write School? Played a product specialist role, with responsibilities including: Supporting Customers Quickturn Application Engineers: coordinating and resolving software, hardware and a university American University Washington, design related issues, problems, bugs and questions. Providing workarounds to customer issues and working with RD to write Millfield School, get critical customer bugs fixed as soon as possible. Was hired as ASD s (advanced simulation division of Quickturn) very first technical support specialist for Speedsim. ATRA Corp., Bayer Inc. Co-Op Internship (full time)
Modeled a MC68HC11E9 Microcontoller Unit in VHDL. The unit included microprocessor and memory components. Implemented design and verification with the help of Bishopstrow ViewLogic tools like ViewDraw, ViewSim and ViewTrace. M.S, Electrical Engineering, University of Massachusetts, Lowell, MA Dec 96. B.S., Electrical Engineering, Regional Engineering College (REC) Surat, India Aug 94. Expertise in Cadence Simulation, Acceleration and Synthesis Tools. Experienced with ViewLogic Schematic, Design and Waveform Viewer tools. Simulation software: Powersuite, Speedsim, Megasim, PowersuiteVHDL, SPICE Emulation/Simulation Acceleration Cobalt, Radium, Palladium DAI: SignalScan, CompareScan Novas: Debussy Mentor Graphics: MTI View Logic: ViewDraw, ViewSim and Millfield, ViewTrace. Strong Verilog skills, VHDL, C, Unix, Perl. References available on request. ASIC PHYSICAL DESIGN ENGINEER.
To achieve excellence, to be resourceful and optimistic and to journal article, pursue a challenging career in VLSI design. Area of specialisation : ASIC Design Flow and Methodology, Simulation, Synthesis, Floor plan, Place Route, Timing Verification, CTS. Summary in write Millfield School short : Have got more than 20 months of experience in the field of what is the purpose of writing Caterham School VLSI. Worked in logical design for 8 months rest in physical design. Moreover i have done my academic project in VLSI field. Arsanti! Software Development Center(I) Pvt Ltd. Design Service Engineer(Physical design) Creating various test cases Benchmarks for customers. Used to create testcases for QA of Avanti tools.
Creating testcases to check various releases of Avanti tools. Clearing Customers doubts queries regarding design tools. Vdesign Training development Centre Pvt lt. Trainee Design Engineer. Responsiblities : Logical design Digital design. Writing Verilog codes for write various small Designs. College? Writing Test benches for designs. Writing Scripts to check the designs. Undergone training on FPGA/ASIC design flow(logical design) and a good Millfield School, methodology,HDL coding for circuit implementation and article School, test bench,simulation, timing Verification,Floorplanning,Place Rout (Vdesign Training Development Centre, PondyCherry). Undergone training on ASIC design flow(Physical design), Datapreparation, Floorplan,Place Route,timing, Physical Verification(DRC LVS). (Time To Market Ltd, Secunderabad). Projects carried out: (Physical Design) Design Specification: Hierarchical design with 5 softmacros.
Hierarchial Floorplanning of Top Cell with core utilization of 75%, alongwith floorplanning of each soft macros with utilization of essay Millfield School 80%. The Rivue Of California, (UCLA)? (Tool used Planet PL ApolloII) Timing Driven Placement of each soft macro with constraints from Synopsis Design Constraints(SDC). Essay School? (Tool used ApolloII Saturn) Clock Tree Synthesis (CTS) of eachsoft macro with a target of skew of 0.2ns and phase delay 0f 2ns. The CTS is carried out for essay American the Top Cell also. Write School? (Tool used ApolloII). What Purpose Of Writing School? Routing of Millfield School each macro and the Top Cell. University Los Angeles (UCLA)? (Tool used ApolloII). Physical Verification for DRC LVS for each macro and the Top Cell. (Tool used Hercules). Company : TTM( as a part of essay School training program in write essay University Physical Design) Designing of Standard Cells of 0.24 technology along with DRC LVS check. (Tool used Enterprise Hercules) Die Reduction Power Analysis : With a core utilization of 98.5%.
Contains 19 hard macros, and essay Millfield School, 28k standard cells. (Tool used ApolloII Mars-Rail) Timing driven :Flat design with an stages, initial slack of -61.3, and congestion overflow of 4.03%. (Tool used ApolloII Saturn) BenchMark For LSI logic involving diesize with 30k std cells with core utilization of 96%. BenchMark For LSI logic involving Congestion driven placement with a core size of 26,000,000 micro^2. Bench Mark for Teralogic involving timing with Tristate Nets High Fanout Nets with timing specs difficult to meet. Essay School? Bench Mark for Teralogic involving Design Planning starting from synthesis to stages of writing an essay, Global rout Its mearly an analysis. (Tools used for above BM's: Apollo, Saturn, MilkyWay, JupiterP) EIGHT-BIT MICRO CONTROLLER. DESCRIPTION: The microcontroller which is the true computer on chip.The design incorporates all of the features found in a microprocessor ie. CPU,ALU,SP,PC,genaral purpose registers and write a good essay Millfield, special purpose registers.It also has added the other features needed to make a complete computer ie.ROM, RAM, parallel port, serial port, counter and clk circuits Like microprocessor , microcontroller is a general purpose device but one that is meant to read data, perform limited calculation on that data and controls its environment based on these calculation.
TEAM SIZE : 7 members. DURATION : 3 months. MY PARTS : CPU, counter timers, Interrupts, ROM and RAM. The Rivue University? POLARIS for simulation. EXPLORERTL for RTL analysis. RTL MODEL OF FOUR BIT MICROPROCESSOR : DESCRIPTION: This four bit processor consists of the following components such as multiplexer, program counter,register,instruction decoder,ALU and timimg control,RAM and ROM .RTL code and write a good School, testbench had been written for article all the above units.Various stimuli had been given and the logic had been validated. TOOLS USED : simulator : MODEL SIM PE 5.3b.
DURATION : JAN-2000 to write Millfield School, APR-2000. COMPANY : Vdesign, Pondycherry. Journal Article International? 10th Matriculation 1993 -1994 74% Higher Secondary 1994 -1996 81% B E in a good essay Millfield Electronics and Communication 1996 -2000 70% (Affiliated to how to essay, Madurai Kamaraj University, TamilNadu). Hardware languages : Verilog. ASIC Methodologies : RTL and Behavioural. A Good Millfield? Assembly languages : Microcontroller. Software languages : C. Operating Systems : Unix,Windows. Script Language : Perl, Unix Shell Scripts, Scheme Scripts(Especially Avanti's Scheme), AWK, SED.
Time Conscious. A go-getter. Quest for how to a university American University perfection in all assignments. Date of Birth : 02-08-1977. Language Known : Tamil, English. Nationality : Indian. Marital Status : Single. References : will be provided on request. Write A Good Millfield? Three years of strong experience in VLSI/ASIC/FPGA design using Verilog HDL, VHDL, VERA HVL, VI editor, VIM, ModelSim, Xilinx FPGA Foundation series, Turbo C, SignalScan, Advanced Norton Editor, Synopsis DC, Cadence Artist, SPICE, SimG, ADSP2115 toolkit, EPROM/EEPROM programmer under Windows NT/95, UNIX and Sun Solaris environment. Digital Logic Design VLSI/ASIC/FPGA Design ASIC/FPGA Verification EDA Tools Simulation and Synthesis tools Design verification using VERA HVL. Hardware Description Language: VHDL, Verilog Design Tools: Modelsim, VCS, SPICE (TI-SPICE), ADSP 2115 toolkit Verification Tools: VERA Hardware Verification Language (HVL) EDA Tools: Synopsis Design Compiler, Xilinx FPGA Foundation series, Cadence artist Protocols and what is the of writing, Standards: Digital wrapper (ITU-T G.709 standard) for FEC in a good Millfield 10GWANPHY, SONET OC-3/3c and OC-192, PCI Bus Interface, ATM, Ethernet, Transition Minimized Differential Signalling (TMDS) for Flat Panel LCD Monitors Languages: C, C++, PERL Operating System: Sun Solaris 2.1, Windows NT/98/95, Unix, MS-DOS Hardware: 10GWANPHY optical board, HUDSON FEC (AMCC S19203), KHATANGA (AMCC S19205), MPC8260.
March 2001 - Till date. Digital Wrapper FEC (ITU-T G.709) Optical Channel Overhead Processor FPGA for 10GWAN. Developed 10GWANPHY (10Gbps WAN) optical board which provided a complete switching fabric solution for Optical Wide Area Networks to support OC-192 Digital wrapper transmission standards (as defined by ITU-T G.709). Developed architecture and coded Transport OverHead (TOH) FPGA which interfaced with HUDSON FEC (AMCC S19203), KHATANGA (AMCC S19205) devices and MPC8260 Motorola Power PC via its Local Bus. HUDSON is University Washington, fully integrated with Variable Rate Digital Wrapper Frammer/Deframmer, Performance monitor and a good School, Forward Error Correction (FEC) device developed by Advanced MicroCircuits Corporation (AMCC). KHATANGA is a dense VLSI device developed by Advanced MicroCircuits Corporation (AMCC) that integrated a 10GbE MAC, a 64B/66B Physical Coding Sublayer (PCS) and a WAN Interface Sublayer (WIS) as baselined by IEEE P802.3ae task force. Used this FPGA to configure HUDSON through its microprocessor interface port, control and monitor status of Optical Channel Overhead bytes/Sonet Overhead bytes (Transport overhead and Section overhead of OC-192c frame) in data channels of HUDSON and to support all Insert/Drop Overhead Channels of HUDSON and stages an essay, KHATANGA. Defined 16-bit Register Memory Map inside this FPGA with predefined memory locations for Parallel 8-bit Overhead Insert/Drop channels of a good essay School HUDSON (both Encoder and Decoder sides) and for serial Insert/drop Channels of Hudson and College, KHATANGA.
MPC8260 wrote overhead byte information into essay Millfield School, FPGA memory locations defined for how to essay University those particular interfaces, which will later be inserted into write a good, insert channels on the next frame. On Drop channels FPGA collected Overhead byte information and stored them in internal predefined memory locations that will be later read by MPC8260. FPGA also monitored all status pins of HUDSON device like Loss of Clock, Out of Frame, Bit Parity Errors (BIP) and reported them to MPC8260. What Caterham School? Implemented FPGA on Xilinx Virtex XCV200E series (FG456 package) and implemented all dual port RAMs using 28 Block RAMs available inside this FPGA. Analyzed system requirement specifications and developed architecture for full functionality of the chip. Automated critical parts of design verification using VERA HVL. Coded MPC8260 local bus, HUDSON and KHATANGA interface modules in Verilog HDL using VI Improved Editor (Vim). Simulated functionality using ModelSim (Modeltech_5.5). Involved in synthesis of modules using Xilinx FPGA tool. Environment: Verilog HDL, VERA HVL, VIM, ModelSim, Xilinx FPGA Foundation series, Windows NT.
Contesse Semiconductor Corporation. October 2000 - February 2001. SONET Transport Overhead Processor FPGA (OHP155) Designed an essay Millfield School, FPGA as part of GigaStream Switch fabric chipset for collecting and transmitting overhead bytes (both Transport overhead and Path overhead of SONET OC-3/3c frame) to/from optical interface. Developed architecture and coding of what Caterham SONET Over Head Processing (OHP) FPGA interfaced with Spectra155 interface, High Capacity Multi-Vendor Integration Protocol interface (HMVIP) and CPU interface. Spectra interface consists of Transport OverHead (TOH) and Millfield, Path OverHead (POH) interfaces to cousework Bishopstrow College, transmit and receive directions from Spectra chip. Four Optical Switch Processor 155Mbps (OSP155) cards shared a single HMVIP interface in a Time Division manner. The CPU interface is a good Millfield, a Network Switching Processor (NSP) CPU interface to OHP FPGA for configuring. College? TOH/POH overhead byte information collected on HMVIP side is sent to corresponding Spectra155 devices. Similarly overhead data that is sent by Spectra155 device is a good Millfield School, sent to HMVIP interface in correct time slot at correct frame location. There are eight dual port asynchronous RAMs implemented in this FPGA.
Analyzed system requirement specifications and developed architecture for full functionality of chip. Coded transmit side modules of International School this architecture in Verilog HDL and tested functionality and performance. School? Developed self-checking testbenches that automatically generated reactive tests using VERA HVL. Used Xilinx synthesis tool for synthesis of design and essay University Washington, generating sdf file. Did post-synthesis simulation of this design.
Environment: Verilog HDL, VERA HVL, Modelsim, VIM, Xilinx FPGA Foundation series, Windows NT. A Good Essay? Contesse semiconductor Corporation. April 2000 - September 2000. Designed an FPGA to convert Fusion Omni-Connection for Universal Switching (FOCUS) bus interface to Packet on SONET physical interface (POS_PHY) bus interface, so that Vitesse s VSC9112 (OC-48) chip could be interfaced to of writing an essay, Vitesse s Network Processor IQ2000 through this FPGA chip. Designed in Xilinx Virtex-E XCV-300E FPGA. This FPGA had FOCUS 32 bus and POS-PHY-3 bus on a good essay, either side to International, convert data (packets) from one bus protocol to other. Multiple packets can be processed in both transmit and receive directions.
Used two FIFOs in Ping-Pong mode to carry Fcells in both receiver and transmit side. Write Essay Millfield School? Did regression testing of Verilog RTL code. Purpose An Essay? Generated random set of valid test cases using a seed value. Used Turbo C for writing a C code, which automatically selected a random number of test cases from the valid testcase library using a seed value. Environment: Turbo C, Verilog HDL ModelSim, SignalScan, VIM, Windows NT. December 1999 - March 2000.
Timing Controller Chip with mini-LVDS and a good Millfield School, FlatLink. What Is The Purpose? Designed a Timing Controller Chip for Thin Film Transistors (TFT) LCD flat panel monitors with MINI-LVDS (Low Voltage Differential Signaling) and Flatlink interface. This chip id designed for customers like IBM, Samsung, LG with programmable display resolutions ranging from XGA to UXGA and to even support SXGA+ and W-UXGA. School? Chip interfaces with CPU display card using TMDS (Transition Minimized Differential Signaling) Flatlink standard for of critical thinkers digital transmission of Video output data at 1.56Gbps, also it interfaces with LCD drivers through MINILVDS analog interface standard. It also generates autogreying patterns automatically to test LCD monitor. Involved in digital architecture design of chip. Write Essay School? Coded the entire architecture in VHDL and did functional testing and simulations of code. Used Shell Scripts for taking test bench (testing file used to ICS — International Community School, test functionality of VHDL code). Used Synopsis DC for synthesis.
Performed post-synthesis simulations. Tested and verified actual performance of chip on LG s LCD monitor. Environment: VHDL, ModelSim, Synopsis DC, Advanced Norton Editor, Sun Solaris 2.1. May 1999 - November 1999. Design of write essay School Flying Adder Digital Logic for PLL (TFP8501) Chip. Journal Article International School? Designed a Scaler chip for LCD flat panel monitors to write essay, support resolutions upto SXGA+/UXGA and to maintain compatibility of various video cards and write essay American Washington, LCD monitor resolutions by upscaling or downscaling resolutions whenever required. Involved in design of Digital logic for Flying Adder PLL (50MHz to 350MHz).
Did coding of essay digital logic in VHDL. Performed synthesis of design using Synopsis DC. Used SPICE for analysis the what is the Caterham School analog behaviour of timing critical nets. Write A Good Essay? Interfaced logic with analog PLL using SPICE. Environment: VHDL, ModelSim, Advanced Norton Editor, Synopsis DC, TI-SPICE, Sun Solaris 2.1. January 1999 - April 1999. Design of characteristics of critical thinkers International School Analog PLL.
Involved in the design of a TMDS receiver chip with HDCP for LCD flat panel monitor to write a good Millfield School, support Transition Minimised Data Signaling protocol with High Data Content Protection. International School? Rate of video data transfer on TMDS channel is 1.6Gbps. A Good Essay School? It enabled data interaction between CPU monitor video card and write Washington, LCD monitors to be entirely digital. Designed architecture of Analog PLL (65MHz to 250MHz). Did Analog circuit design of Phase Frequency Detector (PFD), Charge Pump, Bias Generator and a good Millfield, VCO. Used Cadence Artist and Spice for analog design. Carried out all process corner simulations of individual design modules and how to essay Washington, completed closed loop simulations of PLL. Environment: Cadence Artist, SPICE, SimG, Sun Solaris 2.1.
October 1998 - December 1998. Power Management Module for TFP401 Chip. Involved in a good the Design of a TMDS receiver core chip for LCD monitors. It supports Transition minimized Data Signaling protocol from PC Video cards to LCD monitor. Chip enabled data interaction between PC monitor video card and LCD monitors to be entirely digital. Designed and coded the architecture for Power Management Module in VHDL. Characteristics Of Critical Thinkers Eerde? Did synthesis of this module. Environment: VHDL, ModelSim, Advanced Norton Editor, Synopsis DC, Sun Solaris 2.1. Mignion Systems Limited. July 1998 - September 1998. Design of Single Phase Energy Meter.
Designed and developed an write a good Millfield, Energy Meter architecture using ADSP2115 digital signal processor that calculates voltage, current, power, power factor, frequency and does harmonic analysis. Did assembly language programming of design. Successfully tested design on power lines. Environment: VI editor, ADSP2115 toolkit, EPROM/EEPROM Programmer, Windows 95. M. S. in Microelectronics and VLSI Design. ASIC/FPGA Design Verification Engineer. 2.6 years of characteristics thinkers International experience in FPGA Design ASIC Verification. Proficient with coding RTL Behavioral using Verilog and write a good essay School, VHDL.
Proficient with developing test environment for the rivue Los Angeles (UCLA) functional verification. Proficient in write essay Millfield School developing appropriate test vectors using Verilog,VHDL,Vera and e language. What Is The? Proficient in essay Millfield School writing fully automated test benches. Experience with synthesis and optimization of write a university essay American Washington Verilog/VHDL code Experience with FPGA implementation with Xilinx. Worked on write a good essay Millfield, Mentor Graphics Synthesis tool - Leonardo Spectrum, Synplicity Synthesis tool Synplify Worked on Bishopstrow, different simulator tools- Verilog-XL(Cadence), Modelsim(Modeltech) and VCS(Synopsys).
Worked on Mentor Graphics Schematic Entry Tool – Design Architect. Worked on PCI 32 bit @33Mhz Worked with Specman, an ASIC Verification tool from Verisity Familiar with Vera, an ASIC Verification tool from Synopsys Familiar with DSL Protocol. Familiar with ATM Protocol. Familiar with AMBA Bus Architecture. Familiar with 8085 and 8086 Architecture. Familiar with 8085 Assembly Language. Write Essay Millfield? Familiar with software languages C and Fortran. Good communication skills.
ABC Chips Inc, San Jose, California. FPGA Design Verification Engineer. Name of Project: Network Processor Verification. Wrote test plan for one of the modules in the chip. Developed the test bench for the module. (UCLA)? Wrote test cases in Verilog. Developed the write a good essay School different interfaces around the module.
This network processor is designed to journal article School, provide solution for write essay Millfield 10 Gb Ethernet, OC-192 applications. The ingress device supports a POSPHY Level 4 (PL4 ) interface and the egress device supports CSIX interface to a switch fabric. Tools Used : VCS Modelsim. Of Writing Polimoda? Language Used : Verilog. Name of a good School Project: Link2 Mask Pattern Generation FPGA-SDRAM Controller FPGA.
Designed and Synthesized SWATH cycle Controller module. Stages Polimoda? RTL coding done in Verilog with Verilog-XL and Synthesized using Synplify Developed the write Millfield different interfaces around the Link 2 FPGA. Developed test plan for the functional verification and wrote test cases in writing journal International School Verilog. Done the module level verifications and top-level verification. Reported bugs and essay Millfield School, worked with the how to write essay American University Washington design team in fixing the bugs. This module does interface controlling from the input side and takes the processed data to a good Millfield School, and from SDRAM controller. This module also does the how to a university American University interface to the output swath FPGA. This Link2 acts as a link between the input FPGA and SWATH FPGA. This module does interface controlling from the input side and takes the processed data to and from write, SDRAM controller. This module also does the interface to the output swath FPGA.
This Link2 acts as a link between the input FPGA and SWATH FPGA. Tools Used : Verilog-XL (Simulator),Synplicity (Synthesis tool). Language Used : Verilog. Silicon Grafic Systems, Bangalore, INDIA. Of Writing? IC Design Engineer. Name of Project: Rrishti-1-Trace Receiver ASIC Verification.
Handled the responsibility of verification of all NRT transfers using IBM(Internal Bulk Memory) at module level and device level. Wrote test cases in 'e' language and verified them using Modelsim simulator. Reported several bugs in the design and worked with the designers to a good essay Millfield, fix those bugs. The is a trace receiver, which provides the trace recording capabilities for one of the writing ICS — International Community Emulation controller. The key features of the trace system ASIC are: Provides a maximum of 4 channels operated at single edge clocking (positive edge, negative edge, positive edge and negative edge, or alternatively 2 channels operated with Bi-phase clocking scheme. An optional off-chip trace memory of a minimum of essay Millfield 128 M x 32 words provided by an EMIF(External Memory interface) using 64 bit SDRAMS serving all four channels. On-chip trace static RAM memory organized as 32k x 64 (ie.256 bytes) serving all four channels. This memory is how to a university Washington, used as channel temporary buffers and scratch memory when SDRAM is used to store channel data. trace packet width from 1 to 20 bits 167 MHz processing rate.
The trace peripheral has two distinct sections ,a front end and a back end. The front end (TPFE)acquires the trace data presented by the target and packs this data efficiently into 64-bit words. The Trace peripheral back end (TPBE) dispositions this data to trace memory, managing buffer locations, lengths, and host access to these buffers independent of whether the storing process is active. In short, the write essay Millfield School TPFE contains the acquisition, packing and journal article ICS — School, buffering functions while the TPBE distributes the TPFE generated data into Trace buffers. Tools Used: Modelsim (Simulator),Specman Elite (ASIC Verification tool).
Language used : VHDL (RTL), e language for test cases. Engineering Design Center , Bangalore, INDIA. Hardware Design Engineer. Name of Project : PCI based high speed data acquisition card for a good essay School signal Processing. Designed the Hardware . Is The Purpose An Essay Caterham? Designed the FPGA CPLD . Done the a good essay Millfield School functional simulation synthesis. Done extensive timing simulation with back annotating the sdf. Done schematic Entry using Mentor Graphics Tool. PCI Add on card with PLX 9080 as PCI Bridge and on the local side uses one FPGA , which does all logic including bus arbitration and data transfer to writing International Community School, FIFO . It actually acts as a local processor to PLX 9080. The input to the card includes 16-bit parallel data stream with strobe and write Millfield, 100 Mbps serial streams. Only one of these may be activated at a given time.
The design goal is to accept data rate upto 40MB/s, but the testing will be limited to 20 MB/s transfer to memory. FPGA we were using was Spartan series XCS 40-4 ns. VHDL entry, compilation and functional simulation is done through Model SIM a front-end tool, then after this we had done synthesis through Leonardo spectrum. From that some edf(edif) files are generated and we open those files in the Xilinx tool. We are using Xilinx tool as the back end. Here we place and what is the purpose of writing an essay School, route the design and generate timing simulation data. From there one sdf(standard delay format) file is generated. This includes all the write a good essay internal delays of the device. The Xilinx tool also generates a test bench file. We will apply our stimulus to that Test bench and cousework Bishopstrow College, we make that as the test bench for timing simulation.
So when timing simulation comes we load our design file and essay Millfield School, the sdf file and simulate. Usually the FPGA has to stages, be configured using a serial EPROM. But in our case since the School FPGA is being configured from the system side, it cannot be a permanent data as from EPROM. So we are using the CPLD to configure the FPGA. It will take data through the local bus and load it to the FPGA. Tools : Modelsim (Simulator),Leonardo Spectrum (Synthesis), Xilinx Design Manager (Place Route). How To American University Washington? B.Tech Final Year Project done at ER DCI , Tvm, Kerala, INDIA.
Project Title: VHDL Model of UART. Developed the architecture Designed and done RTL coding in VHDL. Done the functional simulation, synthesis and mapped to the target PLD. Tool Used : WARP 4.1. Simulator used : NOVA. Host Platform : PC under Win95.
Device Mapped : CY7C341 from Cypress ( 192 Macrocell EPLD) Study in detail one Standard HDL Study in detail about the PLDs Write own HDL code to build a model of one Standard UART chip with defined requirements Simulate the code for a good Millfield School functional verification Synthesize and map the design to a suitable PLD. 10.1995 - 05.1999 Degree : c Major in : Electronics and Communication Engineering University :M.G University Kerala, INDIA . Characteristics Of Critical Thinkers School Eerde? Got an award from Silicon Automation Systems ,BANGALORE for being the best project team for the quarter of the year 2000 for the Rrishti-1 Project. Got an award from the customer( Texas Instruments,Bangalore) for outstanding Performance valuable contribution to the verification of Rrishti-1. Doing part-time courses in write a good School San Jose University for. Course 1- Advanced Logic Design (Winter 2001) Course2-VLSI Design I (Winter 2001). Course3-Logic Design using HDL- Project- Bluetooth Transmitter.
Course4-Logic Synthesis- Done using Synopsys DC. REFERENCES : Can be provided based on request. Seeking a challenging position in VLSI design and/or verification where my skills and experience will greatly enhance the company's success and my personal growth. H/W Description Languages: VHDL, Verilog. Place and Route: Lucent OFCC (ORCA Foundry Control Center), Altera Quartus, Xilinx Alliance.
Synthesis: Exemplar logic (Leonardo Spectrum). Simulation: Modelsim, Quicksim from Mentor Graphics, VCS from Synopsys, VirSim (graphical user interface to VCS for debugging and viewing waveforms). Others: Mentor Graphics DA, Autologic II, Visual HDL, Renoir. Languages: C, C++, perl, Unix Internals like Shell and Awk. Operating Systems: Solaris 5.6, FreeBSD 2.2.6, Windows NT/98. Networking Protocols: TCP/IP, UDP, ICMP, NIS, NFS, RIP, OSPF Others: PCI. Revision Control: CVS.
Saristos Logic Corporation, Mountain View, CA. Consultant, ASIC Engineer. As an ASIC Engineer, was a key individual contributor on a team responsible for conceiving, planning and implementing software and hardware systems required to validate Storage Area Network (SAN) systems. Storage Area Network (SAN) offers simplified storage management, scalability, flexibility, availability, and improved data access, movement, and stages, backup. Worked closely with the ASIC and hardware development teams with the a good essay Millfield goal of delivering quality ASIC silicon for advanced storage. Register/memory access via PCI cycles or PCI DMA transfers or RTL hierarchy. Developed ASIC verification strategies for CSC Custom Logic, CAC Custom Logic, EPIF Data Windows, EPIF Interrupt Controller, DMC Scan Engine, EPIF thrasher Sim that span simulation, hardware emulation (FPGA), and real-silicon environments. Wrote ASIC verification test plans that encompass ASIC block-level, full-chip and SAN sub system-level functionality. Analyzed, designed, developed code, documented, and tested ASIC verification test suites using VCS Synopsys and College, System c . Migrated test suites developed in the Verilog simulation environment to both hardware emulation and final silicon lab verification environment. Write A Good School? Each Verification Sim was tested with a model which also takes the same input vectors and generates expected value for College that input vectors. A Good Essay School? The expected Value is checked with the RTL value to verify the what an essay Caterham functionality of write Millfield School each block.
Wrote high level monitors and stimulus models to automate the verification process. Analyzed the timing for Data Windows using Logic Analyzer thus reducing the time for Data Window writes from 1.5 hrs to 18 mins for characteristics thinkers International School Eerde 1GB of memory on Hardware Emulation Platform. Wrote Scripts for HEP (Hardware Emulation Platform) regression suites. Participated in estimating verification development schedules and ensured on time delivery. Infotech Systems Inc., Boston, MA. As a Design Engineer was responsible for conceiving, designing, developing and testing digital circuits for both ASIC and FPGA. Designed and write a good, tested the digital portion of the chip for television.
Responsible for complete cycle from specification through design and test. An Essay Polimoda? Designed the digital circuit using VHDL. Synthesized using Leonardo Spectrum, targeting it to write essay Millfield, Lucent's ORCA series FPGA. Developed simulations with VHDL and simulated it in Modelsim generating the test vectors for testing the FPGA. Developed Verilog testbenches and tested the circuit back annotating with SDF. Checked the timing of the design generating test vectors for Bishopstrow testing the ASIC. Designed and tested Inter-Inter Connect (I2C) circuitry in VHDL and Verilog using Visual HDL. I2C bus defines a serial protocol for passing information between agents on the I2C bus using only a two pin interface. Designed a I2C bus slave interface controller using Visual HDL. Synthesized the circuit using Leonardo Spectrum and targeted to a good essay Millfield School, Lucent's ORCA series FPGA. Developed test benches in VHDL for testing the proper working of the design using Modelsim.
Designed and tested the read channel chip. Thinkers? Worked on three different versions of the read channel. Designed the FPGA using Visual HDL generating the RTL for the design. Tested the design writing VHDL test benches for write Millfield School the proper operation Placed and routed the the rivue University of California, Los Angeles (UCLA) design using ORCA Foundry Control Center targeting to the Lucent's ORCA series FPGA. Evaluated place and route tools for the read channel chip. Evaluated the essay Millfield design to test the read channel chip with various FPGA place and route tools.
Tools evaluated include Xilinx's Alliance, Altera's Quartus tool and Lucent's ORCA Foundry Control Center. Designed and tested the Test Access Port (TAP) controller using Visual HDL. Designed an IEEE standard TAP controller. Generated VHDL code from Visual HDL and tested the controller by writing test bench in VHDL. Simulated it using Modelsim. Developed Perl script for conversion of Spice netlist in to VERILOG netlist. The script written in writing journal ICS — International perl takes in a Spice netlist and gives the write Millfield Verilog netlist. Developed testbenches for the Verilog netlist for the million-gate chip. Developed test sequence for this verilog file for checking the College operation of the chip.
Master of Science, Electrical and Computer Engineering, Southern Illinois University Edwardsville, January 2000. Relevant course work includes Digital VLSI Design, Digital Computer Architecture, High Performance Architecture, Analog VLSI Design, TCP/IP Inter Networking, C++ Programming. Structural and Behavioral RTL description of write essay Millfield School a Simple Educational 16 bits Processor in Verilog. The structural description of the stages an essay Polimoda data unit, the control unit, SRAM and other modules were coded and tested. Other Projects Design of a Linear Interpolation Filter using Verilog and full custom IC layout.
Design of a Simple Educational Processor using VHDL. Designed and simulated a sigmadelta modulator for an EEG IC. Bachelor of Engineering, Electrical and Millfield School, Electronics Engineering, University of Madras, May 1998. Reference: Furnished upon request. ASIC-FPGA Design Verification Engineer. To work where I am given the a university opportunity to assionately exploit my knowledge to the fullest level of satisfaction both personally as well as for the company I serve on the whole. SUMMARY OF EXPERIENCE: Over 7+ years of experience 5+ years of experience in Hardware Design, Development Verification using ASIC, PLD, CPLD FPGA Designing Verification, Board simulation, ANSI C, Assembly, C++, PLI, PCI, VLSI, PCB, Verilog, Synopsis, VHDL,VERA, Gigabit Ethernet,(Networking) SONET,ATM, Device Drivers , Win Board, Synthesis, Verification of Design.CMOS,Embedded System (SOC),Real Time Operating System RTOS), VxWorks, Logic Analyzer, Simulator, Emulator Programming of RAM(SRAM DRAM) With excellent analytical and programming skills. Essay Millfield? Very conversant in documentation, presenting prototypes, client interaction, quality assurance. Good communication and interpersonal skills. Strong Points include quicker grasp to new concepts, the ability to pursue matters in School great detail and able to work in a team. Bachelor of Electrical Engineering from Bangalore University.
Jan 2000 - Present DSSABC Software, Inc., CA, USA. Feb 1998 - Nov 1999 FDD Containers Limited, London, UK. Oct 1996 - Jan 1998 RANDY ENGINEERING, Tripoli, Libya. Jul 1994 - Sep 1996 Advanced Systems Solutions, Delhi, India. Client: Smart Networks Utilties, Santa Clara, CA Aug 2000 to Present. Scope of the essay Millfield project was to design develop a micro controller chip for networking purpose on networking boards, which sends and receives data digitally Supports Gigabit Ethernet on Fiber Optics. My Role: As a team member I was involved in. FPGA ASIC design Wrote verilog HDL code for design. The Rivue (UCLA)? Wrote test bench for a good Millfield verification in the rivue University C Used PLI for communication with Verilog. Integration testing verification.
Functional testing verification. Environment: Verilog HDL , Xilinx-4000 Series , Win Board , C , PLI , ATM, VxWorks , Synopsys. Client: Digital Design, Santa Clara, CA Jan 2000 to Aug 2000. The objective of this project was to design, developed the data networking boards and test benches for verification purpose of pre written functions in verilog . Simulation and Millfield School, hardware development of communication subsystems using the sections reconfigurable-prototyping. Design, simulate, and stages an essay, test digital hardware. Developed data networking boards, and backplanes. Essay School? Performed the design, capture the schematics and oversee the board layout. Performed board simulation and cousework Bishopstrow College, signal integrity. Write A Good Essay School? Environment: Verilog HDL , Xilinx-4000 Series ,VERA, Win Board , C , PLI , VxWorks. FDD Containers Limited, London, UK [Feb 1998 - Nov 1999] Project: DSP Motion Controller 09/98 to 11/99. Client: FDD Container (UK)
The purpose of the essay project was to design and develop micro controller chip 80188EB for controlling the School motion of Mechanical Equipment Boomer there was servo motors which controls Boomer Motion.Servo Motor was controlled by the tech called DSP motioncontroll (Digital Signal Processing). Journal Article Community School? The RTOS was designed implemented on higher priority algorithm, the signals of higher priority is served earlier than a signal with lower priority. The code was written in c inline Assembly on write essay, Host Computer. Design, simulate, and test. Programming of of writing an essay SRAM DRAM. Writing Test Benches for Verification in verilog C. Performed board simulation.
Environment: C, ASIC, Test Bench for Verification, Perl, Synthesis, Verilog, Inline Assembly, Target 80188EB,RTOS VxWorks. Device Programmer, Host Computer IBM PC, Simulator, Emulator, Logic Analyzer. Project: Micro controller Development (Embedded System) For Geo Systems 02/97 to write a good essay Millfield School, 09/98. The purpose of the project was to design and develop micro controller chip 8051EB for an essay controlling heat Generation in Turbines of thermo electric Power plant. The processor controls the write a good essay Millfield School steam temperature.
Which receives the write University Washington signals from Boiler sensors. School? If due to of critical thinkers School, any reason the temperature goes below specified level the alarm will be activated. A Good Essay Millfield? It had the provision of printing the of writing an essay Polimoda Time versus heat graph controlled by the processor 24/7.Programming of the write Millfield School RAM was done by of writing Polimoda c inline assembly. Device programmer was used to copy the a good essay image files on the chip. Of Writing Caterham? Design, simulate, and test micro controller chip. Programmed SRAM DRAM. Wrote verification code in verilog C Performed the design, capture the schematics and write essay, oversee the of critical International School Eerde board layout. Performed board simulation. Environment: ASIC Design, VHDL, Verification, Test Bench, C, PLI, Inline Assembly, Perl, Target 8051, RTOS PSOS, Device Programmer, Host Computer IBM PC, Simulator, Emulator, Logic Analyzer. RANDY ENGINEERING Tripoli, Libya [Oct 96 - Jan 97] Project: Material Management System 10/96 to 01/97.
DOS based Stand alone Database Application developed under C++ for Civil Engineers providing Menu Driven User Interface for calculating the Quantities of material required and write essay Millfield School, its Costing, providing an easy access to what is the purpose of writing Caterham, feed the User input data. Its related Quantity and Cost will be calculated automatically with the a good School help of in-build functions related data Information that is also capable of modifying as per the user specifications and stages of writing an essay Polimoda, standards. It takes the write essay Millfield Complete Details of cousework a building (to be constructed) by providing an Interface and Calculates the quantity of material required with its estimated cost, as per write the standards specified. It provides an easy access for modifications. Environment: C, UNIX and MS DOS.
Smart Systems Solutions, Delhi, India [Jul 1994 - Sep 1996] Project: Employee Scheduler Management Jan 96 - Sep 96. A standalone Application developed using Visual C++ 5.0, for Microsoft Windows95 and Microsoft Windows NT, to be used as the Employees Schedule and its Related Information, in a Large Companies, Hospitals etc. Developed system allows you to get detailed Information with Graphical Representation related to an employee and its Schedule (Working and Leave Duration's Designed for cousework Bishopstrow a Complete year) Allows Online Modifications for Updating the Individual Schedule of an a good, employee, and its related information. Which intern Automatically updates the related Schedules of other employees if desired. Environment: Visual C++, MS Windows 95. Project: Management and Security of Bishopstrow File System Feb 95 - Jan 96. An Application Program of which the Core Part is handled using C++, and the GUI (Graphical User Interface) is a good, handled using Visual C++ for Microsoft Windows 95 and Microsoft Windows NT. Which allows the user to maintain its File System with Security, providing File and characteristics thinkers School, Application Locking. With which it is write a good essay Millfield, possible to lock any Executable Program from being unauthorized Access, by providing Password facility.
It is Capable of Locking Windows95 from being Loaded Unauthorized at the Boot time. Provides an Easy and Quick File Search. Provides Quick Access to file Opening and Executing. Writing Article ICS — School? Provides File Viewing facility before editing the files, giving an Easy access to write Millfield School, Editing. Environment: Turbo C++ 3.0, Visual C++ 5.0, and MS Windows 95.
Project: Standard Product Impress Jul 94 - Feb 95. Impress is a standard integrated package targeted at the Printing and Advertising Companies as the major customers. What Of Writing? It was designed and developed by write Millfield Thomson Technologies, India. The product included modules such as Financial Accounting, Purchase, Sales, Inventory and Production (Studio Section Camera Section). Was a member of the team, which designed the system?
Other responsibilities included coding and testing. Developed 12 forms and how to write a university University, various other Reports. Essay Millfield? Environment: Visual C++, Visual Basic, MS Windows 3.1. Visa Status : H1B. References: Available on request. Nine and a half years of strong experience in Verification of thinkers School Eerde ASICs using Verilog, VHDL, VERA, Verilog -XL, Synopsis VCS, Mentor Graphics Co-Verification Environment, Assembly Language on Unix platform. Write Essay? Expertise in writing Verilog Model, developing test plans, Quick test writing and Polimoda, setting up Verification environment in Verilog/VHDL. Good knowledge of PCI protocol.
Hardware Description Languages: Verilog, VHDL High Level Verification Language: Synopsis VERA CVE: Mentor Graphics Co-Verification Environment Simulation Tools: Verilog-XL, Synopsis VCS, Veriwell Languages: Assembly Language for Intel MCS 51/Motorola MC68000/MIPS processor/ ASM 51 Assembler and Linker/in circuit emulator 51, C OS: Sun Solaris, Unix, Windows 95/NT. Write Essay Millfield School? LSX Technology, Inc., Moutain View, CA. August 01 till date. Verification of PCI bridge( PCI to local) PCI 9656. Wrote random tests for the verification of the writing Community PCI 9656 for Direct Slave . Direct Slave means that the chip is the essay Millfield slave on of writing an essay Polimoda, the PCI bus, Direct master means that the chip is the master on the PCI bus. Worked on PCI compliance testing for the PCI 9656 using Synopsys PCI compliance suite. A Good Millfield School? Worked on FIFO testing. There were 2 FIFOs. One for the Direct slave read and the other for Bishopstrow the direct slave write. Wrote various test and verified the functionality of the FIFOs for both the empty and full condition.
There were numerous condition to fill and empty the School FIFO. One such condition could be no grant on how to a university essay American Washington, the local side or on the PCI bus for the external master. The chip has 3 modes namely M, C and Millfield, J modes . These modes are the local bus types. M mode is 32 bit address/32 bit data, non multiplexed direct connect interface to MPC850 or MPC860. C mode is 32bit address /32 bit data non multiplexed for intel processor i960 and J mode is 32 bit address/32 bit data multiplexed. Environment: Verilog, Sun Solaris. Cousework Bishopstrow? Visitor Graphics Corporation, CA. January 01 - till date. Field Application Engineer. Was responsible to give product presentation, demonstration for the Seamless CVE (Co- Verification Environment). The Hardware and Software Co- Verification helped in software debugging, shirk the system integration time and avoid prototype respin.
Was required to perform evaluation of the product at the customer site. Satisfied the write a good Millfield School customer about the stages utility of the write essay product through a question/answer session and what an essay Caterham School, with follow up visits to potential customers. Performed evaluation of the a good essay Millfield product and against the product of competitors. Environment: Verilog, CVE, Assembly, Sun Solaris 2.x. Advanced Networks, CA. December 99 - December 00. Verification of writing journal ICS — Community School a Packet Classification ASIC. Write Essay Millfield? The ASIC was used to offload the network processor of the job of classification of the packet. The packets could be classified on the basis of the header or any byte of the data payload. The ASIC had system bus interface, ERAM interface, AOC PIB modules. The interface of the chip was like memory so supported both zbt and non zbt modes.
The system bus could be configured as 64 bit or 32 bits. The speed of the ASIC was in what is the of writing an essay the range of 50 - 100 MHz. Wrote diagnostics to verify the system bus interface using Verilog. Build the Chip Verification Environment using VERA. Debugged the failing test cases.
Found several bugs and fixed the bugs. Environment: Verilog, VERA, VCS, Sun Solaris 2.x. June 99 - November 99. A Good Millfield? Verification of a Networking SOC. Involved in Verification of a Networking SOC having MIPS Processor, SDRAM Memory, MAC, PCI and HDLC. Was responsible for Verification of the bridge between the article International Community MIPS Processor and the Toshiba Proprietary bus using Assembly and write essay School, Verilog in a multi master System Verification environment. How To Essay American? Developed several MIPS Assembly and Verilog based test to verify the functionality of the G bridge and HDLC.
Translated the a good essay Millfield School unit level test cases for journal Community HDLC to system level tests. Verified the tests at write Millfield, full chip level. Found bugs, notified the stages of writing an essay Polimoda designer and a good School, suggested fixes. Environment: Verilog, Assembly, VCS, Unix. What An Essay School? January 99 - May 99. Verification of a Network Output Controller. Network Output Controller was responsible for moving data (packet) from the packet buffer (external SRAM memory) through the port FIFO s to the network interface. Write A Good Essay Millfield? Verified the above functionality of the NOC by writing the functional models in Verilog.
Verified functional models. What An Essay Caterham School? Verified Packet buffer read and writing. Write Essay School? Packet buffer was read and written as 1024 bits at a time in 11 clock cycles. Article ICS — International School? Verified the packet Queue (PQ) which performed queuing and dequeuing of the packet through the star address in PB and the skip over mask. Write School? Verified Packet Receiver which received packets from all the University of California, 50 ports at a good essay, the network interface in the TDM manner. Characteristics Of Critical Eerde? Functional model of the NOC was written before the write a good essay RTL could be plugged with other functional models. What Is The Purpose Of Writing An Essay School? RTL replaced the NOC model. Developed the test bench and wrote task for specific functionality. Developed test plans, test cases for the Chip Level Verification of the ASIC using Verilog.
Found and fixed bugs. Environment: Verilog, Verilog -XL, Sun Solaris 2.x. March 98 - December 98. Design and Verification of HDLC Controller (Project Lead) Involved in Design and Verification of HDLC Controller with a generic 8- bit microprocessor interface. The HDLC controller framed according to the HDLC protocol. The frame checksum generator and checker were implemented. The controller was to the ITU Q 921 specification. Designed the a good HDLC controller. Involved in portioning of the design into Transmitter and Receiver.
Verified the HDLC. Synthesized the HDLC. Environment: Verilog, Verilog-XL, Sun Solaris 2.x. Sonet Technologies Pvt Limited. January 97 - February 98. Development of VITAL ASIC Libraries.
Verilog to VITAL converter was used to translate the the rivue Verilog Structural Model to write essay Millfield, VITAL. Is The Of Writing Caterham? Testing was done on Millfield School, Quick HDL simulator, which was one of the sign off simulator for LSI logic. Was responsible for Conversion and journal article ICS — School, Simulation. Environment: VHDL, Quick HDL, Unix. Sonet Technologies Pvt Ltd.
April 95 - December 96. Development of Test Bench for BUS Interface Model for write essay School MC68030 and MC68020. This was implemented using the Co- Verification Environment developed by Mentor Graphics. The hardware (Verilog/VHDL) was simulated on HDL simulator like QuickHDL and stages of writing, the software was simulated on the software simulator (different for each processor). Write A Good Millfield School? The Bus Interface Model was specific to the processor and generated bus related cycles for the processor depending on stages of writing an essay Polimoda, the type of access. The tool was used in write essay Millfield designing embedded system where the software could be verified against what is the of writing Caterham, the hardware before the a good essay Millfield hardware prototype was made. Environment: Verilog, VHDL, CVE for Mentor Graphics, Unix. Parametric Network Limited. November 91 - March 95.
Development and Verification of a Keyboard Controller using 87C51FA Microcontroller. Developed assembly language programs. The keyboard and the system (486 PC) serial communication was established and purpose of writing Caterham School, keys were scanned. A Good Essay Millfield School? Whenever any key was pressed, the make and the break key codes were sent serially in an 11-bit format to the system (486 PC). Provision was made for stages of writing interfacing more than 1 keyboard with this keyboard controller.
This also included the standard PC keyboard. Essay? Environment: Assembly, Unix. To work in ASIC DESIGN/VERIFICATION - Verilog/VHDL modeling, logic synthesis, logic verification, place route, FPGA and writing journal International Community, CHIP layout. VLSI Logic design - Complete design flow from RTL to layout. Excellent in both VERILOG VHDL Proficient with Ethernet (MAC), ATM Utopia Level I II protocols. Complete understanding in architectures of PCI OHCI. Proficient with USB. Knowledge in essay Millfield School Unix, Perl and 'C'. Knowledge in VERILOG PLI CONCEPTS.
Good experience in Digital synthesis and Place Route. Configuring CPLD with bit blaster using MAX+plus II. Characteristics Of Critical Thinkers Eerde? Expertise in Altera /APEX FPGA. Experience in Assembly Language. Analyzed circuits using SPICE. Simulation : Verilog XL from Cadence 2.3, Model TECH 5_3pa version (VHDL Verilog), Leapfrog Simulation for VHDL Accolade Peak VHDL tools.
Synthesis : Leonardo synthesis tool from Exemplar, Synplify from Synplicity. P R : Altera MAX+plusII , Lucent , Quarters Tool for write a good essay Millfield School APEX Devices. Renoir Tool and Xilinx Foundation series 2.1I from Mentor Graphics. Others : Signal Scan and De-bussy for waveform generations Assembly Language : Programming Logic works, C, PERL,UNIX SPICE, MAGIC IRSIM. 'C' Compiler : Green Hills Software. Company I : Analog Systems, CA. Duration : Jan '00 - Till Date. Designation : Member Of Technical Staff.
Company II : Trenton Chip Devices, Inc., CA. Duration : May '99 - Dec '99. Designation : VLSI Design Engineer. Company III : Trenton Chip Devices, India. Duration : May '97 - Apr '99. Write A University University Washington? Designation : VLSI Design Engineer. Essay School? Company : Analog Systems , Inc. Location : Santa Monica, CA.
Designation : Member Of Technical Staff. College? Project : AD 6489 Voice Over Packet Solution, Fully Integrated VoP Solution. Duration : August 2000 - Till Date. The Si was taped out on Oct '2001. The Total No. of gates is 1.2 Millions. Write Essay School? It operates on 125 MHz. It's a .18 micron technology.
The AD6489 family of packet processors performs voice and data packet processing for the SOHO (Small Office/Home Office). SME (Small Medium Enterprises and RG (Residential Gateway ) Market. The features it supports is Layer 3 + Software, Voice and Fax, Signaling, Networking Management, Security, Physical Interface, ATM Support, AAL5, IMA, FR and PPP and Memory support. The AD6489 solution helps the system vendor go to Eerde, market faster by providing a highly -integrated SoC. The SoC comes with a reference board and complete software solution for write a good Millfield both VoIP VoATM based solution. A Powerful Application (API) and plenty of of California, processing power are available for a good essay Millfield the system vendor to provide differentiated value addition to the system. It is having 3 processors namely Control Processor Engine, Wan Processor Engine Security Processor Engine. The AHB bus being the major interface between these processor and the Peripherals, which includes like (UTOPIA, HDLC, UART, GPIO, USB, SPI). There is an intelligent DMA, which does the characteristics of critical International Eerde memory transactions between memory and the processors.
Then for the WAN interface we have 10/100 EMAC and write Millfield, also supports external PCI USB. It has on chip SDRAM controller flash controller 200KB of cousework College on-chip memory for voice and data processing. Developed Designed in verilog the intelligent DMA block. Which does all the write essay Millfield major operation for the above chip AD 6489 the rams. Created Testbenchs for the blocks like UART, SPI DMA. Developed the verification methods created testcases both normal corner for of critical School Eerde UART, SPI DMA. Did the a good RTL netlist simulation for UART, SPI, DMA. Did the other testing like JTAG, MBIST, EMAC, PCI, USB Testing on the RTL netlist level simulations. Did the random testing for the above blocks at the system levels and also for the other blocks.
Verilog XL from Cadence 2.37 Signal Scan/De-bussy for waveforms. Duration : Feb' 00 - July '00. Designed, developed verified the UMAC in VERILOG. This s going to be used and of writing, cable modem chip. The design was target for APEX FPGA from altera 20K200. The design basically consists of 5 interfaces. Physical, Data Drain, Encryption engine, Data Fill and Microprocessor modules. The PHY interface can get the data from simultaneously from 8 devices and a good essay School, gives to Data Fill interface via data FIFO. It also stores the relative information in another FIFO called pointer. From these FIFO Data fill interface dumps the data to the memory . The data drain gets from memory and gives to the microprocessor module. The design operates in 3 different frequencies.
The input data is of writing Polimoda, coming at 10Mhz, which is to the phy interface. The microprocessor interface is working on 60 Mhz and the rest of the interface is working on essay Millfield School, 40Mhz. Verilog XL from Cadence 2.37 Signal Scan/De-bussy for waveforms. Max-Plus II for P R. Synthesis by journal article International Community Syniplify from synplicity. Duration : Jan '00. Implemented the SPI interface in VHDL between SPI and external BUS interface used for IMA. Write Essay Millfield? Leapfrog Simulation for VHDL. Company : Trenton Chip Devices , Inc. Location : Sacramento, CA. Designation : VLSI Design Engineer.
Project : Transceiver Subsystem. Article International Community? Duration : Nov'99 - Dec '99. Designed Developed controller for DPRAM (in verilog) which is used get the Data from ATM fpga and feed to the microprocessor. The microprocessor reads the data from dpram which was written by the ATM fpga. Designed the code in Verilog. Compiled and a good essay Millfield, simulated in MTI Verilog simulator (Model Tech). Renoir Tool and Bishopstrow, Xilinx Foundation series 2.1I from Mentor Graphics. Project : Internet Data Storage. Duration : Aug'99 - Oct'99.
To store the Data into the Disk Array through the user in the internet.The block gets the data to be written into the disk module from the memory for which the CPU provides the address. The data with the parity is then stored in the memory. While reading the data, it regenerates the parity and write Millfield, checks with the parity that is read. Journal? On error, the date is invalidated. The parity and data are stored in the memory through the interface. DMA is used for reading and writing the data into the memory for burst of transaction. Developed Designed the logic in verilog which is specific to Disk Module and it provides the following functions: Raid Parity generation Raid Parity verification Raid Parity reconstruction Interface to the Main Memory DMA.
Compiled and simulated in MTI Verilog simulator (Model Tech). Duration : May'99 - July'99. The OC3 FPGA communicates using either ATM Cells or POS. In ATM mode, the data path is between the Millfield SAR and the PHY via the UTOPIA slave level 1 to UTOPIA master level 2 interfaces. Utopia1 slave is running on 25 Mhz and how to American Washington, data rate is 53 bytes. UTOPIA 2 master is running on write a good essay Millfield, 33 Mhz and date rate is the rivue University Los Angeles (UCLA), 64 bytes. There are two downstream FIFOs and two upstream FIFOs. The FIFOs are used in ping-pong mode alternating FIFOs between ATM cells.
No parity or packet error reporting of any kind is supported. Synthesized the OC3_FPGA, which had the modules like Lucent PCI Master and Target. Module ware Utopia Master and Slave. Interface Data Path Between Tetra and SAR. Completed Place and Route of the above project which was mapped with the Orca Foundary Family, of the Architecture 3T800 Series. Totaled to 390 numbers of PFU. Synplify Syntheses Tool From Synplicity V 5.1.4. Lucent Place And Route Tool Version 9.35. Company : Trenton Chip Devices. Location : Chennai, India.
Designation : VLSI Design Engineer. Project : Verification Of USB Open Host Controller. Duration : Jan' 99 - Apr'99. Member in the verification of Open Host Controller, which controls the transaction running on USB bus. It fetches the Endpoint Descriptor and Transfer Descriptor from memory and performs the appropriate action depends on the information from the Descriptor. These Descriptor includes the information about the device. Developed the PCI Test Bench for OHCI.
Created testcases for the functional verification of OHCI. Host Controller is a device which serves devices attached to the USB bus. It is write a good School, interfaced to the PCI bus for accessing the system memory. Designed this core using both VHDL and VERILOG. This design has different types of modules. PCI Master and Target block Open Host Controller block Interface between USB and PCI side Host SIE Root Hub. Project : Design of PCI master/target. Duration : July' 98 - Dec' 98. Designed OHCI compliant PCI master/target function. Done testing on this module. Carried out synthesis of all these modules using EXEMPLAR LEONARDO.
Done Place and Route using ALTERA MAX+plusII. PCI Master initiates transaction on the PCI bus for getting the ED/TD's or data's for USB devices from main memory or updating the data from USB devices to main memory. PCI target responds to writing journal School, configuration transaction's and other Bus Master's initiates transaction. Implemented the logic for PCI Target and PCI Master. Tested the whole project using ModelTech simulator. Synthesized the logic using Exemplar's Leonardo tool.
Max+plus II tool is used for a good School Place and Route. Mapped the PCI core into the Altera Flex10k30 device. Mapped the characteristics International Eerde USB side core into the Altera Flex10k100A device. Mapping the write School whole design into ASIC Library and testing is in progress. Total gate count for OHCI project is 33,000 gates.
Project : Design and verification of Hearsee-USB Logic. Duration : Jan'98 Jun'98. Hearsee is a video compression chip used to capture active video pixels from the digital camera, scales down to 2:1/4:1 ratio, compress the pixels and deliver the encoded data to the computer through USB. It consists of video camera interface, scalar, a high quality compressor and USB interface. The picture information coming from the camera is processed by the hearsee block. Of Critical Thinkers School? This data is first scaled down by scalar block according to the mode of operation. This scaled down data is compressed by the compressor block. This compressed form of data is sent through the USB cable. Designed the data flow for the still video capture mode of Hearse Created testcases for a good essay Millfield the functional verification of Hearsee individually in still, motion capture modes as well as combination of still-live modes Performed simulation in modeltech VHDL simulator. Project : Verification of cousework USB Device Core. Duration : Nov' 97 - Dec' 97.
Involved in the verification of a USB Device Core. Write A Good Essay Millfield School? Project : Design of FIFO. Duration : Oct' 97. Designed a 8-bit 256 deep FIFO with revert and latch read pointers. Used Model Tech VHDL/Verilog Simulators and Leonardo Synthesis Tool. Target technology was Altera FLEX10K device. Thinkers International School? Project : Design of a bit stuffer. Designed the bit stuffer in logic works, using VHDL and Verilog.
Project : Design of a Traffic Light Controller and Stepper Motor. A Good Essay School? Duration : Aug' 97. Written an Assembly Language Programme for Traffic light Control and Stepper Motor Controller. Used the add-on card with 8253 Timer and PPI chips along with 8379 for how to University testing of this design. Bachelor of Engineering (Electronics and Communication) 1997. Madras University, INDIA.
7.5 GPA. REFERENCE : Available Upon Request. 1200 Moonlight Dr. Essay Millfield? Santa Clara, CA 95127. Valid H1-B till 2004. The Rivue University (UCLA)? Domain Skills: Micro controller and Microprocessor design and verification. Understanding of communication Protocols.
Applications: Digital Design Methodology Network Flow, RTL coding, Synthesis, Simulation of full chip and write essay, block level designs. Functional verification of full chip design, Physical design skills at chip level, Physical Verification, Writing Software utilities Languages: PERL and Shell Script, C, HTML CAE Tools: Verilog-XL, NCVERILOG, Polaris, Synopsys Synthesis tools, Cadence Composer, Compass tools, DRACULA for cousework Bishopstrow College physical verification, TransEDA and HDLScore for code coverage, AVANTI tools. Essay? OS: UNIX, SUN-OS, and WINDOWS. Network Alliance Corporation. Verification Of a Re-configurable Network Processor (09/01 - present) Client: Crystal Systems, Santa Clara, CA. Crystal's CS2200 is a re-configurable processor with embedded ARC core mainly targeted at the networking applications.
Responsibilities require me to is the purpose of writing an essay School, write directed tests to verify the tile block and a good essay Millfield School, random tests to verify concurrency. Stages An Essay Polimoda? Code Coverage Analysis (07/01 - 08/01) Client: Vertex Networks, Santa Clara, CA. My role required me to analyze the a good test vectors from the viewpoint of code coverage, and furnish suggestions to the verification team as per the findings. Verification Of a Re-configurable Network Processor (02/01 - 07/01) Client: Crystal Systems, Santa Clara, CA. Crystal's CS2200 is a re-configurable processor with embedded ARC core mainly targeted at the networking applications. Characteristics Thinkers? Responsibilities required me to write tests to verify the various modules of the chip, e.g. fabric, road-runner bus, code generator.
I also did the code coverage analysis to Millfield, optimize the test suit for better fault grading. Teriola India Ltd., Gurgaon, India. VLSI Design Engineer. Writing Article ICS —? Design Of a CAN protocol implementation (11/00 - 01/01) The Control Area Network (CAN) protocol is write essay Millfield, used in thinkers School Eerde automobiles for communicating between various controllers inside the vehicle. The project involved converting the latch based design to a flip-flop based design. Essay School? This process involved major timing issues as latch based design had a lot of cycle-stealing. Responsibilities required me to convert the RTL to flip-flop based design and simulate the design to what of writing an essay, see there are no issues with the conversion. Finished my part in essay Millfield record time.
Design Of a microcontroller (10/99 - 10/00) The micro-controller is to be used in automotive Industry for anti-skid braking. It is based on Motorola's Mcore processors. Responsibilities required me to verify, Synthesize and PR the Timer block. This project involved the full Network design cycle, except for RTL Coding. Characteristics Of Critical Thinkers International? MARCUS Tech, Bangalore, India. A Good Essay? VLSI Design Engineer. Design Of a 16 Bit RISC Processor (08/99 - 09/99) It is a general-purpose 16-bit microprocessor core, designed to be used in DSP engines. The project involved full chip design using Design Reuse methodology.Responsibilities required me to Polimoda, design, verify and synthesize the write a good Millfield Program Counter block. Functional Verification of the rivue (UCLA) a 16 Bit RISC Processor (02/99 - 07/99) ARC85 is a family of general-purpose 16-bit microprocessor cores, primarily designed for embedded applications.
The project involves the Full Chip functional Verification of the microprocessor core. The chip was verified using Compass-generated vectors. Write Essay Millfield School? I was responsible for the rivue University of California, (UCLA) writing the test-bench for a good the full chip simulation. Later, the Compass-generated vectors were used to generate the Verilog format vectors for full chip testing. The work also involved the testing of vectors on the netlist generated by the Synthesis tool. Netlist to RTL conversion was also part of the project.
Redesign of 8-bit Microcontrollers(SPC700 series) for Sony Corp(04/98 - 02/99) SPC700 series is a general-purpose programmable 8-bit microcontrollers originally designed by SONY. The project involved the redesign of the stages whole series from 1.4 Micron technology to 0.7 micron tech. It also involved dynamic to static logic conversion. Participated as a member of a 3 member team. Redesigned 2 of a series of 4 microcontrollers. The redesigning involved Logic Conversion, Schematic Entry, PNR and Functional Verification at the block level as well as the full chip level. Essay? Played major role in setting up the how to write American test environment for the full chip. Executed the project successfully in write a good School the first go. Developed a software utility, indigenously, using Perl Shell scripts to of writing an essay, convert the stimulus file from write, ANDO-DIC 8031/32 format to a Verilog compatible format. This saved a lot of expense to the company. Granada Consultancy Services.
Assistant System Analyst. American Express Milleniax Conversion (10/97 - 03/98) The project involved the modification of the existing code for writing journal article ICS — International American Express to make it Y2K compliant. The project was divided in various implementation Groups (IG's). Write Essay? Each IG was responsible for modifying and testing a market. Participated as a member of of California, Los Angeles (UCLA) a 4 member team and later as an a good Millfield, Implementation Group leader. Training in Software Development Process (07/97 - 09/97) It involved training on writing journal article Community School, different Software Platforms, Programming Languages and Graphical User Interface. It also consisted training on Software Development Methodologies.
It also involved a project in C on UNIX to manage an employee database. Advanced Chip Synthesis Workshop (2000) The workshop was conducted by Synopsys Inc. at Teriola, Gurgaon. It focused on advanced chip synthesis methods. 1997 B.Tech. in Electronics Communication Engg (DGPA 8.28) IT, BHU, Banaras, INDIA. Project : Implementation Of Star LAN using PC-AT (11/96 - 04/97) The project involved implementation of Star-LAN using PC_AT's to a good essay, connect two labs in Electronics Department of IT,BHU. The process involved PCB design and C coding of device driver for the LAN card. How To A University American University Washington? Sr.chip designer, with MSEE in VLSI, from Nortel Networks, experienced in ASIC, FPGA, HDL, C/C++, ATM, IP 10GE, SONET and RT embedded, applies for ASIC / FPGA design or H/W position. MSEE in VLSI Design, ECE of a good essay Millfield School UNB, New Brunswick, Canada. Ph.D. Candidate in Computer-Aided Design Center, China.
MSCE in Computer Engineering, WU, China. BSEE in Electrical Engineering, WU, China. SUMMARY OF QUALIFICATIONS. Skilled in stages an essay all phases of Front-end ASIC, FPGA design, including architecture development, writing specification, partitioning, RTL coding, function simulation, synthesis, timing analysis. Skilled in write Verilog, VHDL and SystemC, Specman, Vera, C/C++ and tools: Synopsys's DC, Primetime, GNU, VCS, Verilog-XL, NCverilog, Modelsim, SignalScan and characteristics thinkers International School, Synplify, Xilinx. Skilled in a good board level hardware design, Schematic, Simulation, and PCB in OrCAD, Viewlogic.
Rich experience in H/W and S/W co-design for MPU-based embedded application systems. In-depth working knowledge of ATM, IP, MPLS, GE, SONET and related network protocols, and VLSI devices and theory, ASIC design, CPU architecture, PCI, DSP and firmware development. Good experience in firmware programming in C/C++ under PC DOS, VxWorks and QNX OS. Some experience in mixed signal CMOS IC circuits design, simulation, layout by Cadence tools. Excited by thinkers School Eerde the challenge.
A team work player with creative, self-motivated, cooperative spirit. I have worked in 6 companies and universities in Canada and essay Millfield, China in stages of writing the positions of Senior ASIC Design Engineer, ASIC / FPGA Designer, Lead Hardware Engineer, Hardware Engineer, Firmware Programmer and Research Assistants since I graduated as a MS in a good Computer Engineering in journal article ICS — International Community School 1988. These positions carry over 4-year real experience in ASIC/FPGA/VLSI design, and over 6-year real experience in system and hardware board level development, and 10-year systematic theory studies. My background covers Electronics, Microcomputer, Network, Communication, and Control system. Following are my some ASIC/FPGA hardware and system design experience in a good Millfield School real world in order: Vegatron Networks, Toronto, Canada. 2001 Oct 1 - present. Stages? Senior ASIC Designer, SoC Architecture Engineer. (Permanent full-time) Development of a System-on-Chip ASIC for a new high-performance switching Router.
SystemC, C++, GNU/Visual C++ 6.0, Scripts, High Speed I/O, Verilog, DC, PT, VCS, IP protocols. Developing a high-performance IP routing architecture and interconnection protocol for Millfield the 4-million gates ASIC based on multiple IP cores. Writing a detailed ASIC design specification for RTL design. Vermax Networks, Ottawa, Canada. May 2001 - Sept 30, 2000.
ASIC / FPGA Designer (Permanent full-time) 10GE Egress Traffic Management ASIC Design. Verilog, Vera, Specman, Tcl, DC, PT, Formality, VCS, VerilogXL, SignalScan, Synplify, Xilinx. RSP2 NP, VSC881 Fabric, MPC 8260, PL4, CSIX, PCI32, 10GE, IP, MPLS, ATM, SONET, POS. Developing an ASIC, interfaced to network processor, PL4, H/S interconnect and PCI32. It runs in three clock domains:700MHz, 200MHz, 33MHZ. The main clock is cousework Bishopstrow, 100MHz. Bandwidth is 10gigabit/s. The main functions include frame error check, traffic policing, traffic shape, traffic meter, interface to a good essay School, MAC and network processors.
The project supports 0-15 channels, POS, OC3-192, ATM, MPLS, IP, 1-10 GigaEthernet, voice and data traffic. Wrote ASIC specification, defined interfaces and developed chip architecture. College? Defined and Implemented traffic management algorithms for egress traffic and flow control, Including error check, priority shaping and a good, buffer policing function with optimized structure. Partitioned core-based design and Coded in Verilog at RTL. Designed core-based PCI application interface and stages of writing an essay Polimoda, wrote testbench for it. Wrote simulation models and write a good essay Millfield, performed min. function verification for each block. What Is The Of Writing An Essay Caterham School? Wrote simulation models and performed min. function verification for top level with cores. Synthesized with Tcl scripts , and analyzed timing to fix timing issues at RTL and Gate level. Implementing first version in the prototyping FPGA: XC2V1000-5 FG456 and back-annotated. Defined software interface and supported firmware designers to write ASIC driver.
Vermax Networks, Ottawa, Canada. 2000 May - 2001 Sept 30. ASIC / FPGA Designer. (Permanent full-time) OC3 ATM core project: ATM Traffic Executive ASIC Design. DS3 ATM core project: ATM Traffic Executive FPGA Design. Verilog, Vera, DC, PT, Perl, C/C++, Formality, VCS, NCverilog, Undertow, Synplify, Xilinx, VisionICE for MPU 8260, Adtech and Smartbit Traffic Generator, HP Logic Analyzer, Scope. Deveopled a chip as an ATM traffic scheduler. It works as part of MMC fabric chipset.
It runs in two clock domains: 50MHz and 20MHz. Total 512 traffic schedulers are required. Successfully developed, implemented and tested the chip in the Xilinx's XCV1000E version. Developed and implemented the dynamical linecard, modem bandwidth allocation and sharing. Implemented 4-level QoS ATM traffic shaping, policing functions in 512 modem schedulers. Implemented traffic congestion control based on modem and subport backpressure signals.
Wrote the new version of the ASIC/FPGA design specification, verification and test plan. Developed chip architecture, partitioned, coded in write essay Millfield Verilog at RTL, fixed bugs for all functions. Wrote model driver and testbench in Verilog and Vera to simulate each new block and top level. Synthesized the ASIC by DC, FPGA by Synplify with constraints and Tcl script files. Used Synopsys 's DC and PT timing analysis for timing debug and timing closure. Wrote test script for VxWorks dshell and VisionICE to test traffic in lab by Adtech, Smartbit. Note: I was awarded Vermax's Gold Pride Award due to School Eerde, dedication to the scheduler chip in 2000. VLSI Lab of ABC, New Brunswick, Canada. 1997 Sept - 2000 April. ATM Simulator FPGA Design Utilizing PCI Bus.
VHDL, Synopsys DC, PT, VerilogXL, Viewlogic, Xilinx, C++, PCI32, Logic Analyzer, Scope. Developed an ASIC/FPGA chip for a low cost, high performance ATM simulator to help in write Millfield School the research and teaching of ATM networks in real world in cooperation of EE and CS departments. Successfully developed, implemented and cousework Bishopstrow, tested the ATM chip in the XC4062XLA-09. Developed basic system functions, specifications and architecture for the ATM Simulator. Defined functions of the ATM cell monitor, capture, drop, delay, insertion, error generation. Created a VHDL design flow, partitioned the chip, and coded in VHDL at a good essay Millfield School, RTL.
Designed an EDIF netlist core based PCI32 backend application interface in VHDL. Writing Journal International? Wrote model drivers, testbench in VHDL, then simulated each block and top level. Synthesized by Synopsys's Design Compiler. Timing debug and closure by Primetime. Lab test by C++ programs developed to test functions on a PCI32 FPGA prototyping board. VLSI Lab of ABC, New Brunswick, Canada. 1997 Sept - 2000 April. Some Course Projects in VLSI and Real-time OS.
Verilog, Vera, Specman, DC, PT, Formality, VCS, VerilogXL, SignalScan, Synplify, Xilinx. CMOS devices and IC analog circuits design and analysis using Cadence Analog Work Bench. CMOS IC digital circuits from RTL to layout using Synopsys and Cadence IC tools. Verilog calculator design synthesized by Synopsys and implementation in Xilinx FPGA. VHDL tutorial: Traffic light system synthesized and simulated by Mentor Quick HDL.
Co-supervised senior thesis: RISC design and implementation in Xilinx's FPGA. Real-time, multitasking programming in write School C using various semaphores for QNX real-time OS. Diamond Graphics Inc, Ontario, Canada. 1996 Sept - 1997 Aug. Hardware Engineer, FPGA Designer. (Permanent full-time) Development of MCU-based Controller for a graphic scanner. Synplify, Xilinx FPGA, OrCAD Schematic and PCB, PC DOS and MCU programming in C. Developed a MCU-based high-accuracy digital controller for a graphic scanner.
Developed a new digital control algorithm for the rivue of California, a high-accuracy stepper motor. Designed a MCU-based prototyping board to demo the new control algorithm. FPGA design in Xilinx F1.5, and board schematic and write, PCB design in OrCAD. PC DOS programming and thinkers School Eerde, MCU 8051 firmware programming in C. Digital Design Center, Wuhan, China. 1994 Sept - 1996 June. Ph.D. Project.
Computer-based Non-contact Microsurface Online Measurement. Math algorithms and hardware implementation, DSP, Matlab, OrCAD, MCU 8098 and essay Millfield, C firmware. College? Took part of a team to develop a Computer Integrated Manufacture System (CIMS). Write Millfield School? Developing fast and precise online algorithms based on microscope and CCD sensors. Developed a MCU-base prototyping board to demo a new fast and stages of writing an essay, precise online algorithm. Teinan Tiger Computer Inc, China. 1988 June - 1994 Aug. Lead Hardware Engineer, System Engineer. (Permanent full-time) Computer-based Data Acquisition Network System Development. PC-based Application System design, Digital and a good essay Millfield School, Analog Board design, MCU Firmware in C. Developing a specific Remote Data Acquisition and Processing System for customers.
Leaded a team to successfully develop some computer-based data acquisition network systems, typically which have over 1000 points and are over 100Km away from host control room. Successfully developed some MCU-based electronic measure instruments for these projects. Designed system scheme, circuit boards and firmware in C and debugged in labs. Supports. Teinan Tiger Computer Inc, China. 1988 June - 1994 Aug. Hardware Engineer, Firmware Programmer. (Permanent full-time) An electronic teaching laboratory Development. Schematic and PCB design in Protel, GAL, PAL, 8051 and firmware in C, DOS programming in C. Developing an electronic system to be used for teaching spoken English.
Leaded a team to design, test and install the electronic teaching laboratory for International School customers. Designed a PC-based host to control an audio network comprised of all 64 audio terminals. Designed a digital encoder-based mixed-signal circuit board for the 64 audio terminals. Department of Computer Engineering, Wuhan University, China. Developed a Laser-based 2D Intelligent Automatic Measure Coordinator.
HeNi Laser device and modulation, stepper motor control, photo-electron sensor, H/W and S/W. Design a transmitter with Laser and a receiver with a coordinator to measure physical displacements. Write A Good Essay School? Successfully developed a MPU-controlled automatic measure coordinator with stepper motors. Utilized a modulated Laser beam; Used 8031 MCU to be a controller and programmed in C. How To Washington? Training Courses at Nortel Networks from 2000 to write Millfield, 2001. Advanced DC Synthesis Workshop. Synopsys's VERA HVL Workshop High-level Chip Design in Verilog.
Verification Strategies in Verilog High-Speed Circuit Design. Primetime Training Workshop PowerPC 8260 Workshop. Tornado Training Workshop. Master Degree Courses (1997-1999 in EE and CS ) GPA = 87% ( 4.0 / 4.3 ) EE6123 Semiconductor Devices ( CMOS Modeling ) EE4173 Devices and circuits for article International School VLSI ( CMOS IC processing ) EE6133 VLSI Circuits Design ( analog VLSI circuits ) EE6213 ASIC Design ( digital ASIC design ) CS6812 Computer Aided Logic Design ( logic methodology ) CS6845 Computer Networks and Open Systems ( IP Networks ) EE4243 Data Communications ( Modem, Ethernet ) EE4273 Real Time Operation of essay Millfield Microcomputers (RT Programming ) EE6373 Signal Processor Architecture EE4543 DSP II ( digital filter design ) CS4815 Advanced Computer Architecture CS5865 Data Networks II.
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Management Consulting Resume Sample. In order to reach your goal of becoming a management consultant, you need to strike a tone in your resume. In one of the write essay School most competitive fields in the working world, breaking into management consulting requires substantial work and characteristics thinkers International, a perfect resume. Recruiters assume that your management consulting resume is an accurate representation of who you are. If it’s too superficial and commonplace, it might suggest that you won’t be able to a good essay make a valuable contribution to the consulting firm and of writing Polimoda, your resume will therefore be put aside after a short assessment. Breaking into management consulting is a serious goal and you have to craft your resume with quality, value and uniqueness. It must be effective enough to pique the interest of the write School recruiters and convince them to schedule you for what is the purpose Caterham School testing, interviews, and other assessments. Before Writing: Know Your Target Firm. Before you turn on the computer and start typing, allot some time to write essay investigate your target firm. Your knowledge will guide you in writing your management consulting resume; it will help you build a connection between you and an essay Caterham School, your potential employer and essay Millfield, enable you to the rivue of California, (UCLA) construct a unique and write essay Millfield School, personalized marketing tool. Below are some techniques on how to the rivue of California, Los Angeles do this:
How do these activities distinctly help you tailor your resume? First, you will be able to phrase your resume so it resonates with the individual company. Two firms may have the same values, stated in different terms. Alternate the terms in write a good Millfield School your resume to cousework Bishopstrow correspond with each firm you apply with. Moreover, you can emphasize content based on an individual firm’s goals. For instance, if a particular firm values leadership, it’s wise to write a good Millfield School list previous work experience and accomplishments highlighting your achievements in this area. Your cover letter serves as a knock at the consulting firm’s door. It may be key to your invitation to interview, but your resume deepens the picture your resume reviewer gets of your experience and College, background. The reviewer will probably only look at this document for a short time.
All consulting firms receive many applications – this includes both boutique consulting firms as well as top tier consulting firms such as McKinsey, Bain, Boston Consulting Group and Booz. Therefore, your management consulting resume needs to write a good Millfield School provide high impact and be of what is the an essay, a high quality. The key is preparation and outline work before you get started with the writing process. Go through the full resume preparation and a good essay, planning process. Cousework Bishopstrow College. Craft a structure of your resume by brainstorming about your educational, work and volunteer (or other relevant) experiences and listing them. From there, start to narrow down the experience that is pertinent to your desired career path.
Then come up with something like our resume outline (as shown below). This outline is our suggestion, based on our experience with successful management consulting applications. You can, however, use a structure that best highlights your experience in the most compelling way for you. A Good Millfield. The most important point is to offer clarity and strong, action-oriented results and achievement descriptions. Parts of Your Management Consulting Resume. Management consulting resumes can be organized in many different ways, and many follow a pattern similar to the diagram shown. The way you choose to organize it will depend on several factors.
Your personal experience and what you want to emphasize in your resume will come into play. New graduates will probably place greater emphasis on education, academic performance and involvement in relevant extracurricular activities and internships. Experienced consultants will rely heavily on professional experience and characteristics of critical International School, skills. Some of a good, what you write may depend on the firm to which you are applying. Some firms have preferences about what you should highlight in your resume. Tailor your management consulting resume to follow any guidance you have about what the firm wants to see. Edit and revise your resume multiple times in the process. Tailor and virtually rewrite it for each new application. Your resume is how to write a university Washington, a living document that changes as you gain more experience but also when you apply for different positions. This is the section where you will provide basic information about write essay Millfield School, yourself. It may sound easy, but here are a few techniques and reminders you may find useful:
A summary is a brief statement of your major qualifications, expertise, and experience; an objective refers to your career goals and motivation. The former is often utilized by applicants with professional experience, while recent graduates employ the latter. When you write this section, make sure that: It is written concisely but substantially. It should not exceed two to three sentences. It must be related to the desired position and target firm. It must be catchy enough to how to essay American University Washington encourage the recruiters to read the a good Millfield School rest of your management consulting resume. Here’s an example of a summary:
Here’s an writing journal Community School example of an a good essay Millfield objective: Here’s an example of a longer summary: A key consideration when you write about your professional experience is to measure whether or not it is relevant. Is The An Essay School. Is the experience you list directly relevant to the desired position? Activities that are unnecessary to write essay Millfield your career path only waste the limited space you have to make your case for being hired.
It adds nothing and erases prime “application real estate”. For every position you mention, describe your key responsibilities, followed by quantifiable accomplishments in bullet form. Hiring managers want results first and characteristics of critical thinkers Eerde, foremost. Use powerful terms such as verbs and numbers—they make your statements more results-oriented. Some of the write essay Millfield School suggested action words are listed in of critical Eerde the table below: Management consulting resume for experienced professionals would most probably state the Millfield School experience section this way: Executive Vice President, B2B Sales and MarketingManaged a team of 65 sales and marketing executives in a B2B sales structure. Guided product sales and marketing development efforts and managed sales operations. Led expansion to Southeast Asian market and selected and managed a sales team for developing Asian operations. Increased annual revenue by 22 percent year over year over three years.
Expanded market for software products from Europe to North America and Asia and increased sales by 27%. Bishopstrow. Increased annual revenue by 1.3 million USD and achieved profitability and market share. Here’s an a good essay example for how to write University Washington fresh graduates: Project Analyst, Internship Program, STU Consulting Firm, August – September 2012. Assisted a team of management consultants in collecting, analyzing, and presenting market-related information to the client. Brainstormed with experts in creating the design for market researches.
Analyzed industry trends and customer preferences on women’s apparel. Notable accomplishments are the following: Designed a questionnaire that yielded a 80% response rate within one week. Conducted a field interview in shops and boutiques with only 1% data collection error. Write School. Wrote a qualitative analysis of research results after thorough brainstorming. For recent graduates, education plays an write a university essay American important role in the resume. Showing stellar academic achievement and involvement in activities that conferred new strengths and skills will help show preparation for write Millfield a career in management consulting. It serves as your foundation for entering the a university essay competitive industry of management consulting. It’s the indicator of write essay School, your knowledge, competencies, and values. You can include the writing journal ICS — International Community following information in this section:
Here is a good example: Master of Business Administration/Master of Public Administration. Key achievements: Graduated summa cum laude. Focus on relevance when adding skills. You may have a number of practical skills, but they might not be practical for management consulting. Think carefully about what skills you have, such as languages, software, negotiation/communication, and how they fit into your future career. Consider how and why a consulting firm would need or want these skills. If in doubt, find tangible examples of how a less obvious connection can be made between your skill(s) and the consulting career or leave that particular skill out of School, your resume.
Operations: Teambuilding, human resource management, strategy planning, competitive analysis, conflict and problem resolution, project management, risk assessment and management. Financial organization: PL management, financial reporting, budgetary management. Communications: Developing and conducting seminars, negotiation, community outreach. Languages: Native English, native Spanish, fluent French, intermediate business Mandarin Chinese. Personal interests do not need to be included in a management consulting resume, especially if you are running short on College space. A Good Essay School. Interests are more often included in European CVs than American ones. What Is The Purpose An Essay. You will not be penalized for write a good failing to add personal interests. Some personal interests and hobbies, though, illustrate a certain level of perseverance, motivation and passion that may set you apart from other applicants. Being a lifelong competitive marathon runner who trains consistently may have very little to do with consulting but does display a level of discipline and tolerance for hard work.
A history of what purpose of writing an essay School, community service and voluntary work displays personal integrity and commitment. These personal traits may not fit neatly into a “skills and essay, experience” box, but you do not want to fit too neatly into a box either. Briefly show interests where you feel it strengthens your application and makes you stand apart from your competition. One line for interests will do, such as the example below: Personal Interests: Animal illustration, playing the guitar, and the rivue (UCLA), landscape photography. Once you have written your resume, proofread it to a good essay perfection.
You may be able to think of better ways to an essay Polimoda represent yourself the write essay Millfield School second time you go over cousework, it. Never send out a resume without checking the content and a good essay Millfield, form; your candidacy is at how to a university University Washington, stake. Below is a short checklist to ensure that your resume is perfect: Does it communicate the message you want to convey? Ensure that it proves you will be an asset to the firm. Write A Good Millfield. If you miss this part, the Bishopstrow answers to the rest of the questions are fruitless. Is it tailored to the goals and requirements of the management consulting firm? It is write essay School, critical that the recruiter sees that your qualities and personality match the position and the corporate culture. Is the data accurate? Remember that some recruiters validate the information. They sometimes enter your name in the search box, check your LinkedIn profiles, or call your previous supervisors to confirm what you’ve written.
Is it free of typos and grammatical mistakes? These embarrassing blunders reflect poor communication skills and lack of attention to detail. Don’t give the impression that you don’t possess these basic qualities every consultant must have. A University American University Washington. Is the text legible? Don’t use a small font size to essay Millfield accommodate everything on one page, but don’t make it too large because then it occupies too much space. Fancy fonts are highly discouraged. Article International School. Arial, Tahoma, Times New Roman, Calibri, and other conventional font styles are recommended. Does it have the correct margins? The white space around the text and in between categories makes your document reader-friendly.
Is the length sufficient? One page is ideal, two is acceptable, but anything more than that is too long. If possible, ask a friend or professional to read your management consulting resume. Sometimes, a fresh set of write a good essay Millfield, eyes can give you objective feedback. Exercise care when writing a management consultant resume, otherwise you might commit the what is the of writing an essay School following mistakes: Some resumes end up in Millfield School the trash because applicants do not consider this as a critical step or they find it too troublesome to follow the aforementioned guidelines.
As a result, they end up preparing an updated, generic resume they can readily print whenever they send out an the rivue of California, application. Is this a good idea? Yes and no. Yes, to having an a good School updated, generic resume ready in your hard drive because it can serve as your main reference source each time you tailor your resume to fit the firm you apply to. Write American University. No, to the one-size-fits-all approach because your application will always have an impersonal tone and a good essay Millfield, therefore won’t catch the recruiter’s attention. Misrepresentation of Competencies. Another common mistake is misrepresenting oneself. Bishopstrow College. True, you must project your best self in write a good Millfield School your resume, but it doesn’t mean you can make up stories in Bishopstrow College order to be noticed.
If you do, you are fabricating information, a violation against honesty and write a good Millfield, integrity. Even if you are successful in the preliminary screening, your capabilities will still be evaluated during the interview. If you fail to prove you possess the abilities you say you do, you will be rejected and you will realize that you have wasted your and the recruiter’s time and effort. Even if you follow all the characteristics of critical thinkers International School Eerde guidelines in this post, there is still a probability that you might not be invited to write a good essay School interview. Characteristics School Eerde. Unfortunately, it’s a sad reality that there’s an abundance of applicants in this industry. You are competing against candidates as qualified as you, so after sending out your job application, you may want to: Remember to always be proactive in School your application. Nobody said that breaking into this industry is an easy venture. Just take things one step at a time and you will get there one day.
For detailed guidelines on how to write management consulting resumes, download the writing article ICS — Community School Guide to Cover Letters and Resumes. It was written from a recruiter’s point of view, after intensive research and coordination with many applicants. Download Free Guide: How to Get a Consulting Job. Copyright © 2010-2017, ConsultingFact.com. All Rights Reserved. Google+.
Do you want to break into consulting? Download our free PDF guide, which will show you the necessary steps and best practices on how to prepare.
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100 Easy Argumentative Essay Topic Ideas with Research Links and Sample Essays. VirginiaLynne has been a University English instructor for a good Millfield, over 20 years. She specializes in helping people write essays faster and easier. Need a great argument topic? Below I give over 100 ideas. You'll write faster and easier if you pick a topic based on: Knowledge: Picking a topic you already know a lot about can make research faster and easier. Writing Journal Article ICS —. Interest: Picking a question you want to know more about can make this paper more interesting. Available Sources: I give links to many sources. Check those for essay School, articles first and if you find some, your work is of critical thinkers Eerde half done. I also save you time by giving you links to videos and sample student essays.
Check out my guides for writing papers too. Good luck! If you get a good grade, be sure to come back and tell me! 1. Instructions for how to (and how not to) pick a topic. 2. Lists of topic ideas (in the categories of food and write a good essay Millfield School, health, obesity and stages an essay, dieting, recycling and write School, the environment, families and College, relationships, and science and technology, with videos and many links to write essay Millfield School research and student essay examples. 3. Step-by-step instructions for how to write your essay. Choosing a topic that everyone is talking about University Los Angeles, makes writing an write argument essay easier. Make sure you choose a question that doesn't have an answer people already agree on.
Pick a reader that doesn't agree with you, so that you are not preaching to of critical thinkers International School the choir. Write A Good Essay School. It also helps if the topic is something everyone has an ICS — International Community opinion about: this will make it easier to get examples to back up your essay, either from articles or from people you interview. Finally, you probably want to write a good Millfield pick a topic that is interesting to you and that you care about. What Is The. Steer clear of a good School overused topics like abortion, gun control, and the death penalty. For one thing, your instructor has already read far too many of these essays and is not only probably bored with the topic, but also has already heard everything you might say.
Moreover, although those may seem like easy topics, they really aren't, because most people are set in their ways about these issues and it is hard to think of an of writing an essay Polimoda argument that might change their minds. Is Deforestation Worth it? Do the economic benefits of cutting down forests outweigh the environmental damage? What is Love? What kind of love leads to a lasting relationship?
Stay-at-Home Dad: Is it a good idea for a father to raise his children full-time? What causes a man to become a stay-at-home dad and can it work out essay Millfield well for a family? Hunger Hurts: Should Americans think and do more about the hunger faced by people around the University Los Angeles (UCLA), world? Why are Americans rapidly becoming more obese? Why are Americans rapidly becoming more obese? What can be done to help children maintain a healthy weight? How can people lose weight and keep it off? Is weight gain caused by genetics, environment, or some other factor? How do naturally thin people stay that way?
What is the relationship between food, exercise, and weight? Are low carbohydrate diets (like the Paleo, Adkins, and a good essay, South Beach diets) really the best? Do planned-meal diets like Jenny Craig and Nutrisystem really work to help people keep weight off? Why are Weight Watchers and characteristics of critical, other calorie-counting diets often considered the best by doctors? Is controlling weight really a matter of calories in, calories out?
What is the best diet for a young adult? Can vegetarian diets be healthy? Why are so many people now choosing to go on gluten-free diets? Is sugar really bad for you? Does restricting the size of soft drinks that can be sold really help health? Should schools have vending machines that sell sodas, candy, and other bad snacks? What can schools do to promote better health in a good Millfield students?
Does intermittent fasting really help you to cousework Bishopstrow College be more fit? How can morbidly obese people lose weight safely? Is the write a good, T.V. show The Biggest Loser helpful in motivating people to be healthy? Does the show create negative or positive feelings about morbidly obese people? Does it exploit the contestants? What causes anorexia?
How can it be prevented? How can you help an anorexic friend? Why are more young men becoming anorexic? What is morbid obesity? How does morbid obesity affect a person's health? What should we do about the cost of the rivue University healthcare for overweight people? Should there be a greater insurance premium for people who are obese? Is surgery a good method for people to lose weight? Are sugar substitutes helpful for dieting? Is fat really bad for write Millfield School, you?
Is a low fat diet the best? Research Articles on Obesity and Dieting. Here are some professional articles and websites that can help you start. Many of ICS — International these articles contain links to other sources also. Long Term Weight Loss Maintenance, by Rena R. Wing and Suzanne Phelan, in American Society for Clinical Nutrition (2005). The National Weight Control Registry.
An account of over 10,000 individuals who have lost significant amounts of weight and kept it off for long periods of time. Overweight and Obesity. U.S. government reports from the Centers for write essay, Disease Control and Prevention. Diet Topic Articles from Psychology Today . What can we do to help people around the of California, (UCLA), world have clean water to drink? Is hunting good or bad for the environment? Should the horns of a good wild rhinos be removed to prevent them from being poached?
Can we protect wild areas and animals by promoting eco-tourism? Should the government discourage or regulate oil drilling in the gulf of Mexico? What are the dangers of characteristics of critical fracking? Does recycling really make a difference? Should all states adopt a deposit on write essay Millfield School, soft drink bottles and cans in order to promote recycling? Should schools require students to bring refillable containers for of writing an essay Polimoda, water and write essay Millfield School, other beverages rather than disposable ones? Should supermarkets charge for characteristics of critical International, plastic bags in order to encourage the use of Millfield School reusable bags? Should your city (or campus) do more to encourage recycling? What causes people to litter? What could motivate people to is the of writing Caterham clean up after themselves?
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Can it be stopped? What is fracking? Is fracking worth the the rivue University of California, (UCLA), risks? Does fracking hurt drinking water? What is a carbon footprint? How can we change our carbon footprint?
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Where can we use solar, wind, and other alternative energy sources effectively? What is the best way to encourage alternative energy use? (Government regulations? Incentives? Helping companies that produce these products? Advertising?) The World Bank on Environment: Information and research about write Millfield, environmental issues around the what is the purpose an essay School, world. The U.S. Millfield. Environmental Protection Agency: On the science and how to write a university essay University Washington, technology page, find research and information under different topics like water, pesticides, or ecosystems. Discover Magazine: Search the environmental topics page for your topic. U.S.
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Courses - Millfield School
Curriculum Vitae for School Peter Roger Alsop, 2015. Name: Peter Roger Alsop. Address: 14 Perry Street Alphington Vic 3078. Home: + 61 3 9489 1635. Work: + 61 3 9035 9387. Mobile: +61 414 246 943. Personal: Australian citizen.
2014: Graduate Certificate of University Teaching (University of Melbourne) 2011: PhD, School of article ICS — International, Communication and essay Millfield School Media (Royal Melbourne Institute of Technology) 2001: Master of article School, Arts, Composition (La Trobe University) 1993: Graduate Diploma of Millfield, Music Technology (La Trobe University) 1992: Bachelor of Arts, Music and how to write a university essay American Washington Drama (La Trobe University) Professional and educational aspects of my career are based on exploring, developing and integrating the conceptual and technological processes of write a good essay Millfield, a wide variety of art forms and art making, with focus on music and sound art, and how to write a university essay interactive arts. Write Millfield? Over the past twenty-five years my practice has included collaborative and solo works spanning interactive, sound, musical, performance, visual, and community art. 1999 – current: Lecturer in Sound, Research and Higher Degree coordinator; Faculty of Victorian College of the article International Community Arts and Music (VCAM), (0.6 from 2006, full time 1999-2005) Development, review and delivery of a good School, undergraduate, postgraduate, and research courses; committee memberships (research, ethics, design, performance/project development, and Bishopstrow College teaching and learning committees); academic research/professional practice; and maintaining knowledge of, and a good Millfield School research in, current industry practices and University (UCLA) processes. · Creation and delivery of the Interactive Art Media breadth/elective courses.
· Development of essay Millfield, Master of Fine Arts and characteristics International School PhD courses. · Creation and write essay Millfield School delivery of the Master of how to write a university, Sound Design by write essay, Research (now incorporated into cousework Bishopstrow the VCA Master of Millfield, Fine Arts) · Creation and delivery of the on-line course Sound Design Skills. · Creation and delivery of the of critical thinkers School interactive composition components of the Music Composition course in the VCA School of Music. · Member of the VCA Research and Research Training Committee. · Inaugural Chair of the VCA Human Research Ethics Committee from write Millfield, 2005 to 2009. · Developing under-graduate courses in Production with colleagues. · Developing the cousework College Post–Graduate Diploma in Production courses with colleagues. · Forming and maintaining industry connections across diverse areas of the arts, including education, recording, performance, and community; and areas of interactive arts and the art/science nexus.
· Developing and maintaining connections between the various schools at the VCA and a good essay School the broader UoM. 2008 – current: Box Hill Institute (BHI): casual lecturer in music technology. Key responsibilities: development, review and delivery of the Production Styles and Advanced Tracking classes in the Music Degree and Advanced Diploma of purpose of writing an essay, Music Industry courses for first, second, and third year students. Key achievements: collaboratively developing popular complementary courses in write essay Millfield music recording and production, and stages of writing an essay membership of the Box Hill Institute Music Course Advisory Committee and write Millfield Higher Education Board of Studies. 2011 – Performative Architecture Studio/Creative Computing Workshop; Faculty of characteristics thinkers Eerde, Architecture, Building Planning, UoM (casual lecturer) Key Responsibilities: Development and a good essay School delivery of of critical thinkers School Eerde, subjects in conceptual and technical skills in interactive audio and a good Millfield video installation. 2006 – 2007: Northern Metropolitan Institute of thinkers Eerde, Technology (NMIT): casual lecturer in Theatre Production and Computer Music. Key responsibilities: delivery of write School, courses developed by the NMIT staff and course advisory committee, co-ordinating delivery of the courses with other staff members.
2000:Monash University School of Music: Casual Lecturer in Music Production. Key responsibilities: delivery of characteristics thinkers International School, lectures in a good essay School Music Production Processes to what is the purpose of writing an essay Caterham Composition students. 1995 – 1999: La Trobe University Music Department: Tutor in write a good School Interactive Computer Music, Tutor in Harmony. Key responsibilities: tutoring in cousework Bishopstrow tonal harmony and in interactive computer music processes for composition, music history and Millfield School music technology students , to Los Angeles (UCLA) complement lectures in those subjects. ACADEMIC PUBLICATIONS AND CREATIVE ACTIVITIES. My publications are mostly in the area computer based music and the interactive creation of multimedia works, discussing creative techniques, processes and write a good Millfield School outcomes.
These papers fit required Traditional Research Output standards as conference presentations published in cousework Bishopstrow peer reviewed proceedings. My creative activities range through music, sound art, interactive art, visual art, community projects, film, and a good essay web based collaborative works. Bishopstrow College? These activities have been collaborative, taking roles including artistic director, technical advisor, working to essay Millfield assist other artists achieve their vision, and what purpose of writing an essay Caterham as a sole artist. A comprehensive listing of my academic and creative activities is write a good essay Millfield School, found in the following pages. RESEARCH HIGHER DEGREE SUPERVISIONS.
· Natalie Grant, co supervisor. · Camille Robinson, principal supervisor. · Travis Cox, principal supervisor – under examination. · Vincent Giles, principal supervisor. · Elnaz Sheshgelani, principal supervisor.
· Nadja Mott, co supervisor. · Juliana Keller, principal supervisor. · Myfanwy Alderton (co-supervision) · Cobie Orger (co-supervision) Current Master of Sound Design by Research. · Ben Weisner, – under examination.
Completed Master of Sound Design by Research. · Mark Pedersen: Sound Labyrinth: Exploring the Embodied Sublime Through an Immersive Audio/Visual Installation . 2014. · Peter Farnan: Distilling an Essence: the Structuring of the is the purpose an essay Caterham Recorded Pop/Rock Song Form. 2014. · Tisara Munasinghe: Sounds from the essay past : an audio artwork developed from memories of Sri Lankan emigrants in contemporary Melbourne . 2013. · Luke Harralampou: And Their Lungs Reflect What the Sun Means to what Caterham School Them. 2012. · Darren Steffen : Simple subtle sustained waveforms and the notion of comfort in a new approach to creating an Millfield School immersive, interactive sound installation . 2012.
· Elisabeth Viggers : Connections: nothing exists in of writing Polimoda isolation . 2011. · Robert Stewart : SoundNode: a prototype user interface for sound design in essay Millfield School performance environments . 2010. · Kahra Scott-James: Narrative aesthetics – sound design in stages of writing story development: a case for pre-auralvis . 2014. · Paul Fletcher: An abstract narrative form of film: can an abstract form of film successfully include elements of the essay concrete representation based narrative film form? 2009. · Olena Federova (PhD) · Lynn Thompson (PhD - completed) · Andrea Meadows (PhD) · Katherine Edwards (MFA - completed) · Belinda Woods (PhD - complete) REFEREED PUBLICATIONS (Conference/Symposia Proceedings and (UCLA) Journals) · Interpreting Data: Re-contextualizing Data to Develop Approaches to Musical Composition - Vincent Giles, Roger Alsop – Korean Electro-Acoustic Music Society's 2015 Annual Conference (KEAMSAC2015) · Integrating Composer/Improviser’s Actions in write essay School the creation of an stages of writing interactive and provocative composition system – Korean Electro-Acoustic Music Society's 2015 Annual Conference (KEAMSAC2015) · In and Out, Over and write essay Under: AN INTERACTIVE AUDIOVISUAL INSTALLATION RESPONDING TO PERCY GRAINGER’S FREE MUSIC AND THE GRAINGER MUSEUM – 2015 International Computer Music Conference, Texas. · Sublime: An Open Approach To Collaborative Performance – Travis Cox, Roger Alsop - Australasian Computer Music Conference (ACMC), Victorian College of the Arts, 2014. · TWITCH: translating microscopic fast motion to a musical composition – Roger Alsop and Peter Myers, 2014 (published through ANAT/CSIRO) · Gesture, sound and place. – ISEA2013 proceedings – Roger Alsop and Mark Pedersen (MSD student), 2013. · SPEECH: creating a virtual audio-visual artwork – International Computer Music Conference, Perth 2013. · An Approach to Feature Extraction of Human Movement Qualities and Its Application to Sound Synthesis. – Mark Pedersen and Roger Alsop – ACMC, Queensland University, 2012.
· FLUIDITY – WE ARE WATER: THE DEVELOPMENT OF AN IMPROVISED AUDIOVISUAL PERFORMANCE – Water Issues Relating to Environmental Landscape Sustainability’ World Water Day, IRESA, Universite de Sousse, Tunisie, 2012. · As parts of a recomposition of social meaning that transcends previous modes of classification – Autopsya, 2012. · ActionA/V: An Improvisatory Process For Translating Movement to an Audiovisual Outcome – ACMC, Australian National University Canberra, 2010. · The Trouble with CARE: Creative Arts and how to write a university University Washington Research Ethics – Australian National University (Publisher), B. Bolt, R. Write Millfield? Vincs, R. Alsop, M. Sierra, G. Kett 2010. · Diversionary Space Project at is the purpose an essay Caterham Royal Melbourne Hospital Short Term Dementia Ward – Darren Steffen (MSD student) Roger Alsop; UNESCO Observatory 2009 e-journal. · Sound Design Skills: exploring a blended learning environment for developing practical and conceptual skills – Roger Alsop and write a good School Marsha Berry; Media Arts Scoping Symposium (MASS) Proceedings, VCAM, Melbourne, 2009. · Integrating Text Sound And Vision in stages of writing Polimoda an Interactive Audio Visual Work – International Conference on Music Communication Science, University of write a good essay Millfield, New South Wales, Sydney , 2007. · The biggest shed in the world: an approach to computer enhanced creativity – ACMC, Australian National University, Canberra, 2007. · Weaving Relationships Between Sound and Image in Improvised Performance – Roger Alsop Paul Fletcher (Master of Animation student); ACMC, Adelaide University, Adelaide , 2006. · Compositional Processes in thinkers School Developing Poly-Media Performance Works – (ACMC) Edith Cowan University, Perth , 2003.
· The Ineluctable Modality of the Audible: Exploring the sound worlds of write a good Millfield, James Joyce’s Ulysses – World Forum of Acoustic Ecology Symposium, VCA , Melbourne , 2003. · Teaching Electro-Acoustic (EA) Composition to a university essay American University the Uninitiated ACMC Queensland University of Technology, Queensland, 2000. · Exploring the Self Through Algorithmic Composition – Leonardo Music Journal, Vol 9: 1999; MIT Press. · Personal Expression Through Algorithmic Composition – ACMC, ANU , Canberra , 1998, also published in the e-journal Mikropolyphonie. · An Approach to write School Making Music From Speech – Winner of the New Music Australia Prize for Music and Writing: 1993. Cousework? This paper was expanded and presented at a good essay Millfield Synasthetica '94, ANU, as Making Music From Speech. ACCEPTED REFEREED CONFERENCE PAPERS.
· Transforming Art: Processes for Developing Audio-Visual Works – Sounding Out 5 conference, Bournemouth University, 2010. · Realtime Integration of Sound, Image and an essay Text in Creating Performance , a three day artist in residency was associated with this paper – Theatre Noise Conference, Central School of a good Millfield, Speech and Drama, University of London, 2009. · Crossing Media in Practice: Improvisation Across Art Forms – Third International Congress of Synesthesia, Science and Art 09, International Foundation Arteciudad / artecitta, Granada, 2009. Amounts are rounded to lower $1000. Architecture, Building and Planning Project Seeding Grant, internal MSD grant. Near Miss Funding Grant, internal VCA grant. Internal VCA funding for the 2014 Australasian Computer Music Conference, provision of venues and speaker fees. Characteristics School? Cash and In Kind. Let Me Count The Ways – Arts Victoria/VCA.
My Wonderful Everyday – Vic Health. Behind the Scenery – Royal Botanic Gardens. SELECTED RECENT CREATIVE WORKS 2015 to 2000. ICIA – KEAMSAC: Seoul. Flow2000 – KEAMSAC: Seoul.
usedlost – Sound Kitchen: Prague Quadrennial 2015. Vespers’ Bells – Tilde New Music Festival Melbourne. Let Me Count the Ways – Collaborative web based work. Who’s That Girl – short film: music, atmos, dialog and write a good foley. GreenPress – sound - youtube advertising/information for writing journal International the GreenPress cafe. Bubble Muffin – sound - pilot and write essay School pitch for ABC children’s show. Wall – Audio Visual work; seensound, Melbourne. Infundibular – Dancehouse; 2014 Fringe Festival (Artistic Director) In and Out, Over and University of California, Under – NiteArt at the Granger Museum, interactive installation. Motion 5 – Australasian Computer Music Conference, Melbourne 2014.
Substation workshop (Exploring improvisations in Music Dance and write essay Millfield technologies) Tilde New Music Festival (Live Guitar Improvisation and Recorded performance of piano works Ambit Improvisations 1) SPEECH – International Computer Music Conference, Perth 2013. ActionA/V SoundLabyrinth – interactive audio workshop presented at ISEA2013 Sydney with Mark Pedersen. Motion 4 – Audio Visual improvisation with Brigid Burke (clarinet); seensound, Melbourne. Fluidity: We Are Water – Improvised audio visual work; Water Issues Relating to Environmental Landscape Sustainability’ World Water Day. ORB – Audio Visual work; seensound, Melbourne. A GENTLE COLLAPSING – Audio Visual work; seensound, Melbourne. Takutsubo – Australasian Computer Music Conference, Queensland University.
Uploading the writing journal article ICS — International Community School Goddess – Sound Design Composition. A Good Essay Millfield? Husk Theatre. Das Shoku Shake – 45downstairs – Melbourne Fringe Festival. Waiting for is the an essay Godot – La Mama (remount) Luminescence – Music for Imagined Dances; Dance Massive, Dancehouse. Little Con – improvised performance; Cecil Street Studio. Empty – improvised performance with performer Annmaree Ellis; Studio 202. My Wonderful Everyday – web based audio work funded through VicHealth, Technology, Arts and write essay School Social Connection Scheme (TASC) grants program. Cook: an is the exploration – video system design and programming; La Mama. Waiting for Godot – sound design; La Mama Theatre.
Angels – visual work; White Street Project. I know what you did – interactive video work; White Street Project. Alphington Wetlands Festival – audio system design and mixer (also 2005, 2006, 2008) Undue Noise 3 – interactive video and sound improvisation with Paul Fletcher; Castlemaine. the GO SHOW – sound design, multi location performance event; Melbourne International Arts Festival; (MIAF) Behind the write a good essay School Scenery – web based audio work created as Artist in Residence; Royal Botanic Gardens Cranbourne. Yelling at Stars – mentor/project development/interactive programming; Next Wave Festival. Pole – audiovisual work; Geek Chic at Loop, Melbourne. Artist in Residence, Federation Square – interactive audio works. White Spider – musical composition; MIAF. 5 – multimedia work – (ACMC) ANU; Canberra.
Yelling at Stars – development phase mentor. Yellow Wallpaper – sound design; Malthouse Theatre. Grand Union Orchestra – sound design and mix; Festival Melbourne2006 and Los Angeles Stonnington Jazz Festival. phoFAUX gallery opening – composition/sound design; Footscray. Dreamlake – interactive music and a good Millfield video performance; with Paul Fletcher, Bendigo. Once Upon A Time – audio composition; Empirical Soundings, Bendigo.
Wetlands Mix – Alphington Wetlands Festival and City of Yarra Commonwealth Games opening. Ambit – audiovisual work; (ACMC) Adelaide University, Adelaide. Local Migration – video/installation work; with Hoang Tran Nguyen, Big West Festival. Grand Union Orchestra – sound design and mix; Malvern Town Hall Melbourne International Jazz Festival. Sixteen Words for Water – sound design/composition; Courthouse Theatre. Yellow Wallpaper – sound design; The Storeroom Theatre. Wetlands Mix – audio composition; Alphington Wetlands Festival.
Pillage – musical composition; One for the Love of University of California,, God (compact disc book) Ngee Ann Polytechnic, Singapore. the eclipse re-emergence of the oedipus complex – a film by essay Millfield, Stewart Home – sound recording and editing. Grand Union Project – sound design and writing article ICS — mix; Melbourne International Jazz Festival, Chapel off Chapel; Eureka Festival, Ballarat. Saint Mark’s Passion – sound design; Trades Hall Theatre. Tet Festival – sound design and School mix; Richmond City Council. The Three Interiors of Lola Strong – sound design; 45Downstairs Theatre. Grand Union Project – sound design and mix; The Loft. Cycle – musical composition; Electric Rainbow Coalition Festival, The Bregman Electronic Music Studio; Dartmouth College, New Hampshire.
Shoes’ – multimedia composition; e*mergence, PICA, Perth. Secrets of the is the of writing Caterham School Hidden City – sound design; Melbourne Museum. Krapps Last Tape – sound design; La Mama Theatre. Moon Lantern Festival – sound design and mix; Richmond City Council. Tet Festival – sound design and mix; Richmond City Council. Remembrance of Things Past – sound design; VCA School of write a good Millfield, Drama (MIFA) Playback – multimedia composition with choreographer Don Asker, VCA School of Dance. How Can We – multimedia composition; Clubelectronische, Melbourne Fringe Festival. Improvisations – collaborative performance; Danceworks, Melbourne Fringe Festival. Scenes of the Future from the Past – sound/spatial design; Not Yet It’s Difficult (performance group), Office Space Car Park, Melbourne.
Springtime – sound design; Griffin Theatre, Sydney. The Three Interiors of Lola Strong – creative development phase. The Rice Paddies – sound design/composition; Melbourne International Festival of the Arts, Maribyrnong Big West Festival. The Wall – creative development phase. HamletMachine – composer/sound design; Adelaide Fringe Festival.
Portrait of Caterham, [Dora] – composer/sound design; La Mama Theatre. Bega Arts Festival Opening – composer/sound design, Bega. Place and Memory – creative development phase, Melbourne Museum. Under an open minded sky – composer; with text by poet Felix Nobis, Hawthorn Town Hall and write a good the Australian Computer Music Conference, Melba Hall. In the company of stages Polimoda, friends – composer; SAMTV (channel 31) program Portraits of a Composer. Sea Visions – composer; Gabriella Smart (piano) performed in Hobart, Burnie Melbourne. Reflex – composer; Linden New Music. Victoria University postgraduate performance student Annmaree Ellis in a good essay Millfield School developing interactive improvised performance skills. 2010.
Victoria University postgraduate dance student Anna McLean in how to write essay designing interactive performance systems. Essay School? 2008. Performer Willoh S. University Los Angeles? Weiland through the SPARK program, provided by Youth Arts Queensland; this project resulted in write Millfield the Yelling at Stars performance, performed on what of writing School the closing night of the 2008 Melbourne Fringe Festival at the Myer Music Bowl and a good essay Millfield School 2015 MONAFOMA. 2006. SELECTED AUDIO RECORDING EXPERIENCE.
Wakulpa – Luke O'Neill; winner, 1994 ABC Radio National Melbourne Fringe Music Award. Kagome – Nadoya Music and Dance Company; digital editing and cousework mastering. Driftwood – Anne Norman and write essay Millfield School Michael Livett; digital editing and mastering. The Tempest – Peter Tahourdin, recording and Polimoda mastering, for the Australian Opera. Box Hill Institute Higher Education Board of Studies. Box Hill Institute Music Degree Course Advisory Committee.
Editor – Journal of Fine Arts and write essay Aesthetics. Referee – New Interfaces for Musical Expression 2016. Referee – Digital Creativity Journal 2015. Referee – Digital Humanities Conferences 2011 to 2014. Referee – Australasian Computer Music Conferences 2007 to 2011, 2014. Referee – Media Art Scoping Study proceedings 2009. Editorial Panel – Second Nature: International journal of creative media.
Co Organizer and College referee for 2014 Australasian Computer Music Conference (Melbourne) Co Organizer and essay Millfield School referee for 2002 Australasian Computer Music Conference (Melbourne) Co Organizer and referee for 2003 World Forum of writing article ICS — School, Acoustic Ecology Symposium (Melbourne) VCA School of Production Indigenous Liaison Officer 2002 to a good essay Millfield 2004. Research assistant to Professor Richard Vella, La Trobe University Music Department, 1998 - 1999.
International Organisation of Scenographers, Theatre Architects, and cousework Bishopstrow College Technicians (OISTAT) Sound Working Group. Electronic Music Foundation (EMF) Multicultural Arts Victoria. Australian Network for write a good essay Art and Technology (ANAT) Australasian Computer Music Association (ACMA)
International Computer Music Association (ICMA) Greenroom Contemporary and Experimental Performance Committee. Human Computer Sciences Network (HCSNet) ISM and CHASM; The Frog Peak Music Collaborations Project, (compact disc)